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In the PSOC 4 datasheet the CM input range for SAR is stipulated as
Vss to Vdda, should it be Vssa to Vdda ?
Also in TRM no discussion mentioned if SAR is a R ladder solution. Reason
I ask is the linearity specs are only speced for Vref >= 1 V, but if architecture
is R ladder one would think much lower Vrefs would still experience the same
linearity performance ? Or is this related to switch performance in the ladder
mux to decision comparator ?
Regards, Dana.
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Dana:
1. re VSS vs VSSA, you found a typo. It should indeed be VSSA as this agrees with the TRM and other documentation.
2. The SAR ADC is not a resistive ladder, it a multiple-level switched capacitor type.
---- Dennis
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There is another problem in the datasheet, no mention in
absolute max ratings the relationship between Vdda and Vdd
nor Vssa and Vss.
That should be added.
Thanks seg.
Regards, Dana.