PSoC™ 6 Forum Discussions
Hi guys,
For the psoc6(PN: CY 8C6347FMI-BUD53) project development is using the CY8CKIT-005 MiniProg4 ,but it only programme 1 set board one time, lower yield for MP. could you shared the multi-program kit and related link for the mass production.
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The PSoC 6 TRM and PDL indicates there is support for large data transfers using the DMAC instead of DMA.
The CY8C6247BZI_D54 on the CY8CKIT-062-WIFI-BT does not seem to support DMAC, though. Referencing cy_dmac.h, the entire hearder+source entire header+source for cy_dmac are conditionally compiled out due to:
#if defined (CY_IP_M4CPUSS_DMAC) || defined (CY_IP_MXAHBDMAC) || defined (CY_IP_M7CPUSS_DMAC)
Looking at another P6 variant CY8C614ABZI-S2F04, there are DMAC symbols defined, but there is not an equivalent for the CY8C6247BZI-D54 variant on the evaluation kit.
#define CY_IP_M4CPUSS_DMAC 1u
#define CY_IP_M4CPUSS_DMAC_INSTANCES 1u
#define CY_IP_M4CPUSS_DMAC_VERSION 2u
None of the other two symbols in that conditional preprocessing check are included for the CY8C6247BZI-D54 either.
Are there P6 variants that do not support DMAC?
Thanks,
Scott
Show LessHi,
Please do guide me on having single .hex that includes both app and boot loader.
I tried this way after post compilation.
@rem Merges App0 and App1 into a single hex file for easier programming
@%CY_MCU_ELF_TOOL% --merge ..\416045_02-Bootloader.cydsn\CortexM4\ARM_GCC_541\Release\S416045_02-Bootloader.elf CortexM4\ARM_GCC_541\Release\416045_02.elf --output CortexM4\ARM_GCC_541\Release\416045_02.elf --hex CortexM4\ARM_GCC_541\Release\416045_02.hex
%CY_MCU_ELF_TOOL% -M %OUTPUT_DIR%\%PRJ_NAME%%ELF_EXT% ..\416045_02-Bootloader.cydsn\CortexM4\ARM_GCC_541\Release\416045_02-Bootloader%ELF_EXT% --output %OUTPUT_DIR%\%PRJ_NAME%_merged%ELF_EXT% --hex %OUTPUT_DIR%\%PRJ_NAME%_merged.hex
this is not working.
attached .ld files
Note: separate bootloader and application updating over the ota is working but to create the single file i am facing the issue.
Show LessHello! I hate to ask what feels like a terribly elementary question but: How does one attach a debugger to the CM0+ in a dual-core project in ModusToolbox? I'm building from the "dual CPU empty app" example an attempting to add a USB CDC device to the CM0+. I'm encountering a hang or exception during CDC initialization on the CM0+, however it does not break into the debugger when debugging the CM4 application. On the other hand, the debug configuration for the CM0+ is set to look for a hex file that doesn't exist. 😕 Convenient.
FWIW, I'm using the CYC8KIT-062S4.
Best,
Aaron
Hi,
I wanted to test Bluetooth with the Bluetooth® LE CTS server and client examples.
I installed the new version ModusToolBox 3.0.
I can compile and run the example but it hangs:
*********************AnyCloud Example****************************
**** Current Time Service (CTS) - Server Application Start ****
************************************************** *************
Bluetooth stack initialization successful
The library manager shows me: See KBA 236134 for instructions on modifying the application to be compatible with 3.x content. but I don't understand the instructions.
The PATH variable is changed and the working directory is empty.
Can someone help
thanks
Board: CY8CKIT-062-WiFi-BT
Show LessI've got the CY8CKIT-062-WIFI-BT Pioneer Kit, and was just trying to work through a Bluetooth example (From Alan Hawse's old 'PSOC 6 101' series.) I came up short when trying to add a BLE component to my schematic, however - the IDE says the component is not compatible with the target defice (which in hindsight I guess makes sense, as the kit is named 'BT' not 'BLE'). Is there a compatible Bluetooth component for this eval board?
Show LessIn the PSoC6 I2C Master example code
https://github.com/Infineon/mtb-example-psoc6-i2c-master/blob/master/README.md
a couple of the functions call need to be updated to match the library.
Additionally, the use of the READ and WRITE buffers was reversed
possibly because the selected buffer names are very confusing.
Please find attached my suggested new code for main.c that I believe to be more correct.
Regards
Show LessHello,
I'm using Modus Toolbox 2.4.
Previously, I used to refer to KBA231373 to make a custom bsp.
https://community.infineon.com/t5/Knowledge-Base-Articles/ModusToolbox-2-2-and-later-Make-a-Custom-BSP-KBA231373/ta-p/251107
In the Modus 2.4, there was an empty project in PSOC6-GENERIC BSP, but I can't find it now.
I want to create a PSOC6-GENERIC empty project, but has it been deleted?
Thanks and Regards,
YS
about the max frequency specs below, i.e. 8 MHz port0, 16 MHz on port 5 to 10
- is this a real limitation or are there ways using internal routing fabric or use or UDB's to get the ECO XTAL out to a GPIO?
- it actually works if you configure ECO -> PLL -> CLK_HF0 > CLK_PERI -> any GPIO... but what are the risks of doing this?
ps. I know that CLK_HF4 can be routed out through P0[0] or P0[5], but can't use those pins
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