PSoC™ 6 Forum Discussions
Hello
I am using an SSD 1306 OLED screen and it's working perfectly. But the problem that when I move it to another function I only see one page?(I want to display the variable i that is in another function but I am not able to) I have attached the project. Can anyone help please?
Thank you,
Ali Issa
Show LessHi,
I am using CY8CKIT-062S2-43012 and testing RTC with Vbackup.
First, I removed R76(0ohm) to separate Vbackup and VDDD.
And I applied 2.5V to Vbackup through an external power supply.
I have disabled the below part in the cyhal_rtc_init function in Cyhal_rtc.c so that the RTC time is not initialized.
That is, I only modified the below part in the [RTC Basics] example.
cy_rslt_t cyhal_rtc_init(cyhal_rtc_t *obj)
{
CY_UNUSED_PARAMETER(obj);
CY_ASSERT(NULL != obj);
cy_rslt_t rslt = CY_RSLT_SUCCESS;
if (_cyhal_rtc_get_state() == _CYHAL_RTC_STATE_UNINITIALIZED)
{
#if 0
if (Cy_RTC_IsExternalResetOccurred())
{
// Reset to default time
static const cy_stc_rtc_config_t defaultTime = {
.dayOfWeek = CY_RTC_SATURDAY,
.date = 1,
.month = 1,
.year = 0,
};
Cy_RTC_SetDateAndTime(&defaultTime);
_cyhal_rtc_set_century(_CYHAL_RTC_INIT_CENTURY);
}
#endif
Test-1. Under the conditions below, the RTC has an error of 15 seconds after 1 hour.
1. VDDD off (USB cable not connected)
2. Apply 2.5V to Vbackup
Test-2. Under the conditions below, the RTC time is nearly accurate after 1 hour.
1. VDDD on (USB cable connected)
2. Apply 2.5V to Vbackup
Q) I thought the RTC tolerance would only be affected by the accuracy of the WCO regardless of the power supply.
Is RTC accuracy also affected by VDDD?
I am attaching the project file I tested.
Thanks and Regards,
YS
您好 Psoc Creater 的 capsense tuner的 例程编译报错,报错信息如上
PDL 是 3.13版本
附件是 报错的 例程代码,没有任何更改,原版 example
Generated_Source\PSoC6\CapSense_Control.c:983:26: error: 'cy_stc_syspm_callback_params_t {aka struct <anonymous>}' has no member named 'mode'
switch(callbackParams->mode)
附件是例程
Show Less
Hi,
I would like to implement dma triggering using Cy_TrigMux_SwTrigger() function in pdl.
should I call the Cy_TrigMux_Connect() function in advance to use this properly?
Is there any pre-defined macro to use as the parameters of these functions? (trigLine, inTrig, outTrig).
Thanks
Show LessHello,
I just build demo project using Modus Toolbox, which produced HEX file. But when trying to load in PSoC Programmer 3.29.1 it will report error:
Memory Types Load from HEX Finished at 13:09:45
Hex File parsing failure. Unknown record type.
Memory Types Load from HEX Requested at 13:09:45
Using Cypress programmer it is ok for both project (created in PSoC Creator or Modus Toolbox). Does Modus Toolbox produce some different HEX file which is not compatible to older PSoC Programmer ?
Regards
Radim
Show LessDeselecting the Build folders reduces the archive directory. In some cases Deleting the Build folders further reduces the size of the Archive. Is there any explanation for this?
Deselecting the build folders of a Hello World project when archiving works the same as deleting the build folders before archiving. That is NOT the case with the following bootloader example project.
When deselecting the “Build” folders, an archive of a bootloader example project is 10 MB.
If I first Delete the “Build” folders from the project and sub-projects, the archive is 2 MB.
Note: Leaving the Build folders in the archive of the bootloader project creates a 20 MB archive.
Deselecting three Build folders produces 10MB archive
Deleting three Build folders from Project Workspace produces 2MB archive.
Note: The build folders for the sub-projects are automatically re-created after being deleted, but with much less data.
Reference: “Eclipse IDE Survival Guide – KBA225399” @ https://community.infineon.com/t5/Resource-Library/Eclipse-IDE-Survival-Guide-KBA225399/ta-p/254873
Greg
Show LessI'm using CYC8KIT-062S4, FWIW.
When I create the Dual-CPU Empty PSoC6 App, I see a file called system_psoc6.h located under bsps\TARGET_APP_CYC8KIT-062S4. The instructions in linker.ld advise changing the CY_CORTEX_M4_APPL_ADDR value in this file to reflect the length of the CM0P application. This worked in MTB 2.4, however it no longer has any effect in MTB 3.0. The reason appears to be that CY_CORTEX_M4_APPL_ADDR is already defined when this header is included--but where?
I changed my CM0P application to have a length of 0x8000. I then changed the definition in system_psoc6.h to look like this:
#if !defined (CY_CORTEX_M4_APPL_ADDR)
#define CY_CORTEX_M4_APPL_ADDR (CY_FLASH_BASE + 0x8000U)
#endif /* (CY_CORTEX_M4_APPL_ADDR) */
Upon running the application, I see a crash when the M4 is enabled.
If I comment out the 'if !defined' like so...
//#if !defined (CY_CORTEX_M4_APPL_ADDR)
#define CY_CORTEX_M4_APPL_ADDR (CY_FLASH_BASE + 0x8000U)
//#endif /* (CY_CORTEX_M4_APPL_ADDR) */
...and rebuild, I get a ton of 'redefined' warnings, however the application then runs correctly.
Seems like the instructions in linker.ld could use an updating?
Show LessI am using CE219431 which demonstrates using a PDM mic. The example sets a threshold at 128 samples in the fifo before the interrupt is supposed to be triggered, but it seems the interrupt is being triggered immediately after clearing a couple times. I am using PDM_PCM_GetNumInFifo() to get and then print out how many are in the fifo every time the mic flag is set, and the pattern is 129 samples, 1 sample, 1 sample, 129 samples, 1 sample, 1 sample, etc. So basically the interrupt is tripped 2X more often than it should be which is annoying for my application. I have tried messing around with the order of clearing the interrupt and reenabling and resetting the flag, but I can't figure out what the problem is. I also thought it could be that the fifo count needs more time to be updated before interrupts are enabled, or it will trip it, but I added a 5ms delay after reading the fifo, and that didn't have an effect on the extra interrupt triggers.
Anybody else figure this one out?
Thanks for reading my post!
Josh
Show LessI already try this library (https://github.com/Infineon/udb-sdio-whd) with CY8CPROTO-062-4343W, it works with Port_2.
I already succesfully use this library on custom board with a CY8C6137BZI-F34 with Port_2.
I can't make it works on Port_9, anyone has experience any issue on Port_9?
I'm working on Windos10 with ModusToolbox 3.0.
My target would be observe SDIO_clk run on P9_5.
Show LessHI ,
for a new project I have to implement the reading of a rotary encoder on CY8CPROTO-63-BLE PSOC6.. I don't understand if this functionality with the PDL QUADDEC feature is present in the CYBLE-416045-02 chip and what are the dedicated PhiA, PhiB pad pins and if there is a configuration example project in the designer Psoc creator 4.3
Thanks in advance
Robert
Show Less