PSoC™ 6 Forum Discussions

Hi,

I have a CYBLE-416045-EVAL board. According to the schematics, the voltage for the PSoC6 BLE module can be adjusted by setting or removing the jumper J2.

The documentation says: jumper short => 3.3V, jumper open => 1.8V.

I have verified that with the datasheet of the TPS735 voltage regulator, everything looks ok.

However, what I observe is:

jumper short => VDD=3,3V (measured between TP3 and TP2)

jumper open => VDD jumps up to 5V! This is out of specs for the CYBLE-416045-02 module.

I have then measured the voltage at the FB pin (pin 2) of the voltage regulator.

Jumper short => 1.220V (close enough  to 1.208V, ok)

jumper open => voltage goes up to 2.44V (FAIL), should stay at 1.208V.

It seems that the voltage regulation of the TPS73 fails.

I have looked at all resistors and capacitors, everything looks like it should be according to the schematics.

What is wrong, what should be changed to set VDD to 1.8V?

Update: It seems that the problem only occurs when the jumper J2 is pulled while the board is powered.

Regards,

Guenter

Hello,

I recently designed a PCB using CY8C6137BZI-F34 MCU, and it seems there is something somewhat unclear in the documentation.

I based my design on the recommendations in the "Design examples for unused SIMO VBUCK" thread (https://community.cypress.com/thread/46660​), which states that:

The SIMO pins VBUCK1, VRF, VDD_NS, VIN1 and VIND2 can be left floating. VCCD is Internal core regulators' (LDO) output. It requires bypass capacitor connection for proper operation. 1uF is connected on VCCD when VBUCK1 does not power VCCD.

I did exactly that in my design with a 1 µF capacitor on VCCD:

However, our firmware engineer had to choose the "Core Regulator" as "Buck" in the "System/MCU Parameters" section in Modus Toolbox, as shown below:

The other option "Normal Current LDO" is set in the CY8CKIT-062-WiFi-BT using CY8C6247BZI-D54 MCU:

This design has an inductor connected between VIND1 and VIND2 and pins VBUCK1 and VCCD connected together through R129:

This looks to be counter-intuitive, since the way I designed it would use the internal LDO, and the way the CY8C6247BZI-D54 was designed would use a buck regulator ... anyway, with "Buck" chosen as the Core Regulator, our design seems to work.

From the information I can gather in the "PSoC 6 MCU Hardware Design Considerations" document (AN218241) at section 3, there is an on-chip buck regulator that outputs a voltage on VBUCK1 pin, and we can choose to supply VCCD with it or not. Contrary to what the "Design examples for unused SIMO VBUCK" thread states, this pin should not be left floating and would require and bypass capacitor for proper operation (not present in our design). As for VCCD, it is the internal core regulator's output, and requires a bypass capacitor for proper operation (present in our design).

With that in mind, could someone please help me with the following questions?

- Is there something missing in my design that could cause problems later? I think that I might require a bypass capacitor on VBUCK1 pin.

- Do I have to connect VBUCK1 with VCCD, or can I leave it like that? Are there limitations in not connecting them?

- Are there any system configurations precautions that we should take in Modus Toolbox?

Thanks for your help!

I'm trying to do something pretty unconventional.   I have an Observer node that I'm trying to scan only ONE channel for advertisements.

I'd like to know if the following are possible?  If so, what are the API calls?

• Configure the Observer to scan, 1, or 2 channels.  3 channels are the default.   I know how to configure the Broadcaster for 1, 2 or 3 channels.  I was wondering if there was a converse function for the Observer.
• Configure which of 1 or 2 channels is being scanned.
• When I receive an Advertising report on the Observer, is there a way to tell  which channel it was received on.  Note:  The reason for this request is that I currently have a Broadcaster advertising on 3 channels.  I have an Observer scanning all 3 channels.   The Broadcaster is with 1 mm of the Observer and not moving. When I receive the advertised packets, I notice that I get different RSSI values for each of the 3 channels (37, 38, 39).  Each varies about 6dBm.
  However if only Broadcast on only one channel, my RSSI results are at most 1dBm and usually 0dBm.

Again, I realize this is unconventional, however I do have an application I am targeting.  If successful, I will share some example code with the forum.

Thanks for everyone's help in advance.

Len

I would have expected the IDE to generate the macro's for the pin-instance.

Is this feature removed for the PSoC 6?

This is my first time working with the PSoC 6.

Dear community,

For a couple of days I'm trying to extract data from a sensor. I tried using the examples and application notes but could not get it working. I tried it with DMA and interrupts but quickly decided it was too difficult.

The waveforms look good and the Logic analyser displays the correct information. The image below shows a single read-transaction. I only need the second value 0xA800.

main loop

    for(;;)
    {
        UART_PutString("Start Loop:\r\n");
        clearErrors();
        for( int i =0; i < 10; i++){
            printf("%x\r\n", readSPIWord(0x24));
        }
        
        CyDelay(1000);
    }

functions

void clearErrors(){
    //Write bit + 1E address + 07 data
    SPI_Write(0x1E07 & SPI_WRITE_BITMASK);
    //Write bit + 1F address + 0x46 keycode
    SPI_Write(0x1F46 & SPI_WRITE_BITMASK);
}

uint16 readSPIWord(uint8 address)
{
    uint16 readword;
    SPI_Write(address << 8);
    while(SPI_IsBusBusy());
    SPI_ClearRxFifo();
    SPI_Write(0x0000);
    while(SPI_IsBusBusy());
    readword = SPI_Read();
    return (uint16)readword; 
}

(Wrong) Result

Could someone point me in the correct direction?

Hi,

I've got multiple BLE Advertising nodes and one Observer.  I'm trying to identify each Advertiser uniquely at the Observer.  Right now, they all have the same 48bit BDAddr.

All the Advertising nodes have the same application in it. Is there a way to use part of the SIlicon ID as the BDAddr?

I've trying using the following code to change the BDAddr with no luck.  Maybe this is the correct code but not in the correct place.

    cy_stc_ble_gap_bd_addr_t bdaddr = {{0xFF, 0xBB, 0xAA, 0x50, 0xA0, 0x00}, 0};    // create the BDAddr struct
    Cy_BLE_ChangeAdDeviceAddress(&bdaddr, 0);            // fill in the new BDAddr

Len

I'm trying to create a BLE Broadcaster node that publishes the Time Service once a minute using only Advertiser packets only.  Is there a code example?

Note:  I do not want to support connections on this node.  I realize that I can supply a UIDD with data as part of the Advertiser packet.  I also have already created an Observer-only BLE node that can decode the advertisement data.

Len

Hello,

There are a couple of older (circa 2010) articles in the Cypress archives from Kendall Castor-Perry about USB Audio clock recovery, and much talk about a PSoC-based solution for a stable and reliable USB audio interface.  I'm not having any luck turning up relevant reference designs, dev kits, or other info on the Cypress site.  The closest I found was an Apple Lightning based solution, which isn't appropriate for my application.

https://www.cypress.com/file/122521/download

https://www.cypress.com/documentation/technical-articles/designing-modern-usb-audio-systems

I'm in the process of a redesign of the USB audio interface for my company's product line and am very interested in exploring more in this realm, as the article touches on many topics we've struggled with using other vendor's solutions over the years, so I'm particularly interested in taking advantage of the work Cypress has done in this realm.

I'm a long-time Cypress customer/developer, going all the way back to the original generation of EZ-USB micros when they were originally developed by Anchor in the late 90s, and have done several designs on those, as well as FX, FX1 and FX2's.  Also used some of the lower cost Cypress USB micros nearly 20 years ago.  New to PSoC.

thanks,

Steve

Hello.

What is the BLE of the Package name meaned?

Thanks and Best regards.

Glenn.

Any help or pointers appreciated please.

I'm having unexpected difficulties in interfacing a relatively common display to my PSoC6 prototype board.

Anybody know how to do it?

There are several efforts by Alan Hawse online but I have found these to be a) varied across IDE which I don't use and b) otherwise incomplete in terms of code (or with errors arising on my system - which of course may be due to differences in issues and timing of blogs).

I say these difficulties are 'unexpected', since I already have an ADAFRUIT M0 Feather board running with this display and using the u8g2 library (which may be found here) under the Arduino IDE.

PSoC 6 ENVIRONMENT:

Board: CY8C-PROTO-063-BLE / CYBLE-416054-02

IDE: PSoC Creator v4.2

PDL: 3.1.0

OS: Windows 10 (build 1903)

BUILD:

Created an I2C Master device and connected to SCL and SDA pins appropriate to my board

Display device needs only 4 wires to connect - the above two, plus 3V and GND

Downloaded and added in the U8g2lib to the project folder.

In Project Build Settings, I added the 'src' library folder as an additional directory to the Compiler.

Once the application was generated, I added the 'U8g2lib.h' header file into the header folder of the cm4 processor and #included it in 'main_cm4.c'

ISSUES:

The compiler throws errors such as missing 'arduino.h', 'print.h', U8x8lib.h' and so on. All of which makes me think I may be using a library that's too dedicated towards the Arduino IDE, or it may be a lack of experience in adding a library to a PSoC 6 project.....

All ideas welcomed - thank you.