PSoC™ 6 Forum Discussions

Hi,

I'm digging deeper into the PSoC 6 devices. As far as I can see PSoC 63 and upwards are BLE 5.0 devices. Will they also support BLE 5.1? Is this only related to the BLE software stack or would it need a new device?

Regards

What is the Maximum DMA Speed for a PSoC 6? I run Clk_Peri at 100MHz and get a Frequency of 9.14 MHz for 32Bit Memmory to Memmory Transfers. I only Trigger once for 256 Words in a 1D Transfer. Are higher speeds Possible? The M4 is not Started.

I need a parallel Capture with at least 16 MHz.

I'm trying to use CMSIS-DSP (CMSIS DSP Software Library ) in PSoC Creator:

PSoC Creator 4.3

Peripheral Driver Library 3.1.2

I got CMSIS from CMSIS_5/CMSIS/DSP at develop · ARM-software/CMSIS_5 · GitHub , and tried to adapt the instructions for "Building only the CMSIS-DSP library" in CMSIS_5/README.md at develop · ARM-software/CMSIS_5 · GitHub .

I had to go into CMSIS_5/CMSIS/DSP/configCore.cmake and SET(HARDFP OFF) to get something compatible with PSoC Creator.

I put:

SET(CMAKE_C_FLAGS "-mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -mthumb -ffunction-sections -ffat-lto-objects -Os")

in CMakeLists.txt.

Then, I ran this command in my build directory:

cmake-3.17.3-Linux-x86_64/bin/cmake -DROOT="/mnt/c/Users/carlk/CMSIS_5" \

  -DCMAKE_PREFIX_PATH="/mnt/c/Program Files (x86)/Cypress/PSoC Creator/4.3/PSoC Creator/import/gnu/arm/9.3.1/bin" \

  -DCMAKE_TOOLCHAIN_FILE="/mnt/c/Users/carlk/CMSIS_5/CMSIS/DSP/gcc.cmake" \

  -DARM_CPU="cortex-m4" \

  -G "Unix Makefiles" ..

and then ran

make VERBOSE=1

Resulting in these libraries:

./bin_dsp/BasicMathFunctions/libCMSISDSPBasicMath.a

./bin_dsp/BayesFunctions/libCMSISDSPBayes.a

./bin_dsp/CommonTables/libCMSISDSPCommon.a

./bin_dsp/ComplexMathFunctions/libCMSISDSPComplexMath.a

./bin_dsp/ControllerFunctions/libCMSISDSPController.a

./bin_dsp/DistanceFunctions/libCMSISDSPDistance.a

./bin_dsp/FastMathFunctions/libCMSISDSPFastMath.a

./bin_dsp/FilteringFunctions/libCMSISDSPFiltering.a

./bin_dsp/MatrixFunctions/libCMSISDSPMatrix.a

./bin_dsp/StatisticsFunctions/libCMSISDSPStatistics.a

./bin_dsp/SupportFunctions/libCMSISDSPSupport.a

./bin_dsp/SVMFunctions/libCMSISDSPSVM.a

./bin_dsp/TransformFunctions/libCMSISDSPTransform.a

To start with, I am trying to adapt this example: Practical FFT on microcontrollers using CMSIS DSP – M0AGX  There is really not much to it:

void fft_test(void){
static arm_rfft_instance_q15 fft_instance;
static q15_t output[FFT_SIZE*2]; //has to be twice FFT size
arm_status status;
status = arm_rfft_init_q15(&fft_instance, 256/*bin count*/, 0/*forward FFT*/, 1/*output bit order is normal*/);
printf("FFT init %d\n", status);
arm_rfft_q15(&fft_instance, (q15_t*)_mnt_c_Users_carlk__Documents_Audacity_679hz_raw, output);
arm_abs_q15(output, output, FFT_SIZE);
for (uint32_t j = 0; j < FFT_SIZE; j++){
printf("%d ", output);
}
printf("\n");
}

These are my CM4 compiler options:

-mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -mthumb -I..\CMSIS_5\CMSIS\DSP\Include -I..\..\printf -I. -IGenerated_Source\PSoC6 -IGenerated_Source\PSoC6\pdl\cmsis/include/ -IGenerated_Source\PSoC6\pdl\devices/psoc6/include/ -IGenerated_Source\PSoC6\pdl\devices/psoc6/include/ip/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/device/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/efuse/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/flash/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/gpio/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/ipc/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/lvd/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/profile/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/prot/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/scb/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/sysanalog/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/sysclk/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/sysint/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/syslib/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/syspm/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/systick/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/trigmux/ -IGenerated_Source\PSoC6\pdl\drivers/peripheral/wdt/ -IGenerated_Source\PSoC6\pdl\middleware/ -IGenerated_Source\PSoC6\pdl\utilities/ -Wa,-alh=${OutputDir}/${CompileFile}.lst -g -D NDEBUG -D CY_CORE_ID=0 -D CY_PSOC_CREATOR_USED=1 -D CY8C6347BZI_BLD53 -Wall -ffunction-sections -ffat-lto-objects -flto -Os

and linker options:

-mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -mthumb -l CMSISDSPTransform -l CMSISDSPCommon -l CMSISDSPBasicMath -L Generated_Source\PSoC6 -L ..\..\..\..\BuildCMSISOnly\build\bin_dsp\TransformFunctions -L ..\..\..\..\BuildCMSISOnly\build\bin_dsp\CommonTables -L ..\..\..\..\BuildCMSISOnly\build\bin_dsp\BasicMathFunctions -Wl,-Map,${OutputDir}/${ProjectShortName}.map -T cy8c6xx7_cm4_dual.ld -specs=nano.specs -Wl,--gc-sections -g -ffunction-sections -Os -flto -ffat-lto-objects

The problem is that the link fails:

arm-none-eabi-gcc.exe -Wl,--start-group -o "C:\Users\carlk\Documents\PSoC Creator\Turbmon.cydsn\DSP Test.cydsn\CortexM4\ARM_GCC_Generic\Release\DSP Test_link.elf" .\CortexM4\ARM_GCC_Generic\Release\startup_psoc6_01_cm4.o .\CortexM4\ARM_GCC_Generic\Release\main_cm4.o .\CortexM4\ARM_GCC_Generic\Release\dsp.o .\CortexM4\ARM_GCC_Generic\Release\system_psoc6_cm4.o .\CortexM4\ARM_GCC_Generic\Release\printf.o .\CortexM4\ARM_GCC_Generic\Release\stdio_user.o .\CortexM4\ARM_GCC_Generic\Release\cyfitter_sysint_cfg.o .\CortexM4\ARM_GCC_Generic\Release\cymetadata.o .\CortexM4\ARM_GCC_Generic\Release\cy_efuse.o .\CortexM4\ARM_GCC_Generic\Release\cy_flash.o .\CortexM4\ARM_GCC_Generic\Release\cy_gpio.o .\CortexM4\ARM_GCC_Generic\Release\cy_ipc_drv.o .\CortexM4\ARM_GCC_Generic\Release\cy_ipc_sema.o .\CortexM4\ARM_GCC_Generic\Release\cy_ipc_pipe.o .\CortexM4\ARM_GCC_Generic\Release\cy_lvd.o .\CortexM4\ARM_GCC_Generic\Release\cy_profile.o .\CortexM4\ARM_GCC_Generic\Release\cy_prot.o .\CortexM4\ARM_GCC_Generic\Release\cy_sysanalog.o .\CortexM4\ARM_GCC_Generic\Release\cy_sysclk.o .\CortexM4\ARM_GCC_Generic\Release\cy_sysint.o .\CortexM4\ARM_GCC_Generic\Release\cy_syslib.o .\CortexM4\ARM_GCC_Generic\Release\cy_syslib_gcc.o .\CortexM4\ARM_GCC_Generic\Release\cy_syspm.o .\CortexM4\ARM_GCC_Generic\Release\cy_systick.o .\CortexM4\ARM_GCC_Generic\Release\cy_trigmux.o .\CortexM4\ARM_GCC_Generic\Release\cy_wdt.o .\CortexM4\ARM_GCC_Generic\Release\cy_device.o .\CortexM4\ARM_GCC_Generic\Release\cy_scb_common.o .\CortexM4\ARM_GCC_Generic\Release\cy_scb_i2c.o .\CortexM4\ARM_GCC_Generic\Release\cy_scb_ezi2c.o .\CortexM4\ARM_GCC_Generic\Release\cy_scb_spi.o .\CortexM4\ARM_GCC_Generic\Release\cy_scb_uart.o .\CortexM4\ARM_GCC_Generic\Release\cy_ble_clk.o .\CortexM4\ARM_GCC_Generic\Release\retarget.o .\CortexM4\ARM_GCC_Generic\Release\UART_1.o -mcpu=cortex-m4 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -mthumb -l CMSISDSPTransform -l CMSISDSPCommon -l CMSISDSPBasicMath -L Generated_Source\PSoC6 -L ..\..\..\..\BuildCMSISOnly\build\bin_dsp\TransformFunctions -L ..\..\..\..\BuildCMSISOnly\build\bin_dsp\CommonTables -L ..\..\..\..\BuildCMSISOnly\build\bin_dsp\BasicMathFunctions "-Wl,-Map,.\CortexM4\ARM_GCC_Generic\Release/DSP Test.map" -T cy8c6xx7_cm4_dual.ld -specs=nano.specs -Wl,--gc-sections -g -ffunction-sections -Os -flto -ffat-lto-objects -Wl,--end-group

ERROR: DSP Test.cydsn\CortexM4\ARM_GCC_Generic\Release\DSP Test_link.elf section `.text' will not fit in region `flash'

ERROR: region `flash' overflowed by 407812 bytes

collect2.exe: error: ld returned 1 exit status

The command 'arm-none-eabi-gcc.exe' failed with exit code '1'.

What am I doing wrong?

Hi,

The PDL's documentation for Cy_Crypto_Aes_Init() states that "Call to initialize this encryption technique before using any associated functions. You must initialize this technique again after using any other encryption technique."

For me, that means that if I only use AES encryption, I only have to call this once at the beginning. However, I'm also toggling between computing CRCs and encrypting data with AES. CRC is not an encryption technique, so must I still call Cy_Crypto_Aes_Init() after using Cy_Crypto_Crc_Run()?

Thank you,

Fred

Can PSoC6 be connected to parallel SRAM in some way?

Customers need more than 3MB of SRAM for graphic.

Best Regards,

Inoue

I downloaded CE223820 IPC Pipes sample project and was able to run it.  Then I incorporated the pipe into my project and ran into issues with it not working.  From the following discussion I determined this is due to BLE using the same pipe and I need to implement the user pipe. I really feel like the documentation for implementing the user pipe and the need for using it if you are using BLE is lacking.  It would be helpful if the sample project had implemented both options.

Re: IPC pipes stop working when BLE is introduced in project CE223820_IPC_Pipes01

I made a copy of the CE223820_IPC_Pipes project and added the cy_ipc_config.h and cy_ipc_config.c to create the CE223820_IPC_Pipes_userpipe project.  I want to get the user pipe working in this project before adding it to my real project with BLE, Uart, MCWDT, and other components.  I intend to use sleep modes but not sure if I will use Deep sleep.  I will also be initiating the messaging from the CM4 versus how this project starts with the CM0.  I assume that means I will have the MessageCallback and ReleaseCallback in the CM4 and just the MessageCallback in the CM0, correct?  So if there are any further implications to the IPC pipe based on what I want to do that would be great to know too.

I debugged the attached project.  In the CM4 I receive the message from the CM0 but I fail at line 466 in cy_ipc_pipe.c.

So, I have something wrong with the ipcPtr but I haven't been able to figure out what I missed.  Hopefully someone can spot my mistake(s)!

thanks,

Kim

Hello All,

I need help to choose the best possible 32 bit Micro controller for the Space related project. The initial requirements for the project are as follows :-

(1)  Project Should be RTOS based so controller should support RTOS based features.

(2) Upto 16 Analog and 8 Digital I/O requirements.

Hello,

What is the setting value of AIRCR.PRIGROUP[2:0] using FreeRTOS?

The result of reading the AIRCR register in the task was 0xFA050000.

AIRCR.PRIGROUP[2:0] =000 ?

   volatile uint32 temp32;

   ...

   temp32 = SCB->AIRCR;

The result of reading both NVIC_GetPriorityGrouping() and NVIC_GetPriority(SysTick_IRQn)was below.

        temp32 = NVIC_GetPriorityGrouping();

        temp32 = NVIC_GetPriority(SysTick_IRQn);

result:  NVIC_GetPriorityGrouping()=0

            NVIC_GetPriority(SysTick_IRQn)=7

Best regards,

Yocchi