PSoC™ 6 Forum Discussions

Dears,

I would like to use debug uart. I have problems with Retarget IO library to initialize the UART block.

Partial code:

int main(void)
{
cy_rslt_t result;

/* Initialize the device and board peripherals */
result = cybsp_init() ;
if (result != CY_RSLT_SUCCESS)
{
CY_ASSERT(0);
}

/* Enable global interrupts */
__enable_irq();

/* Initialize retarget-io to use the debug UART port */
result = cy_retarget_io_init(CYBSP_DEBUG_UART_TX, CYBSP_DEBUG_UART_RX, CY_RETARGET_IO_BAUDRATE);

printf( "Demo started...\r\n" );

/* Create the RTOS tasks */
xTaskCreate(audio_app_process, "Audio App Task",
RTOS_STACK_DEPTH, NULL, RTOS_TASK_PRIORITY,
&rtos_audio_app_task);

...

/* Create RTOS Event Group */
rtos_events = xEventGroupCreate();

/* Start the RTOS Scheduler */
vTaskStartScheduler();

/* Should never get there */

return 0;
}

Can I use different pins TX and RX instead of default 5.1 and 5.0 (these pins are on CY8CKIT-062 shared with I2S audio) I tried to move it to 9.1 and 9.0 and after first calling printf("") it will hang.

Have anyone idea what could be wrong ?

Regards

Radim

Hi Community,

I am using CY8C6247BZI-D54 microcontroller. I had used internal Opamp for amplification and I measured the output of the Opamp. For different input, I found different gain. What should it be?

Thank You.

Are any Hardware Description Languages supported with Modus Toolbox?

If not directly, is there a process to support Verilog or VHDL inputs?

ModusToolbox supports a Hardware Abstraction Layer (HAL) to interface Software to Hardware. What options are available to create Hardware blocks of logic or functions independent of the Software?

Greg

Hi,guys,

I use PSOC6(CY8C614ABZI-S2F04) to measure 2 channels of temperature with AMUXBUS,P9.3 as ch1 and P9.4 as ch2.the circuit is attached for your reference. the problem I met is as following:

1.P9.3&P9.4 are initialized as AD inputs and connected to AMUXBUS_A and AMUXBUS_B.

   Cy_GPIO_Pin_FastInit(GPIO_PRT9, 3,CY_GPIO_DM_ANALOG, 1, P9_3_AMUXA);

   Cy_SAR_SetAnalogSwitch(SAR, CY_SAR_MUX_SWITCH0, (uint32_t)                  (SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VPLUS_Msk), CY_SAR_SWITCH_CLOSE);

  SAR->CHAN_CONFIG[8] = (uint32_t)0x72;

  Cy_GPIO_Pin_FastInit(GPIO_PRT9, 4,CY_GPIO_DM_ANALOG, 1, P9_4_AMUXb);

   Cy_SAR_SetAnalogSwitch(SAR, CY_SAR_MUX_SWITCH0, (uint32_t)                  (SAR_MUX_SWITCH0_MUX_FW_AMUXBUSB_VPLUS_Msk), CY_SAR_SWITCH_CLOSE);

  SAR->CHAN_CONFIG[9] = (uint32_t)0x73;

  when I only heat RT1 ,the voltage of P9.3 rises(AD value becomes bigger),but the voltage of P9.4 also rises(AD value becomes bigger).

  when I only heat RT2,the voltage of P9.4 rises,but the voltage of P9.3 also rises.

2.P9.3 is changed to GPIO and disconnected from AMUXBUS_A,P9.4 is unchanged.

  Cy_GPIO_Pin_FastInit(GPIO_PRT9, 3,CY_GPIO_DM_HIGHZ, 0, P9_3_GPIO)

  Cy_SAR_SetAnalogSwitch(SAR, CY_SAR_MUX_SWITCH0, (uint32_t)(SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VPLUS_Msk), CY_SAR_SWITCH_OPEN)

   when I only heat RT1,the voltage of P9.3 rises,but the voltage of P9.4 has no change.

3.P9.3 is set as AD input and connected to AMUXBUS_A again. P9.4 is changed to GPIO and disconnected from AMUXBUS_B

  Cy_GPIO_Pin_FastInit(GPIO_PRT9, 3,CY_GPIO_DM_ANALOG, 1, P9_3_AMUXA);

   Cy_SAR_SetAnalogSwitch(SAR, CY_SAR_MUX_SWITCH0, (uint32_t)                  (SAR_MUX_SWITCH0_MUX_FW_AMUXBUSA_VPLUS_Msk), CY_SAR_SWITCH_CLOSE);

  SAR->CHAN_CONFIG[8] = (uint32_t)0x72; 

 Cy_GPIO_Pin_FastInit(GPIO_PRT9, 4,CY_GPIO_DM_HIGHZ, 0, P9_4_GPIO)

  Cy_SAR_SetAnalogSwitch(SAR, CY_SAR_MUX_SWITCH0, (uint32_t)(SAR_MUX_SWITCH0_MUX_FW_AMUXBUSB_VPLUS_Msk), CY_SAR_SWITCH_OPEN)

 when I only heat RT2,the voltage of P9.3 rises too!

4.P9.3 is changed to GPIO and disconnected from AMUXBUS_A,P9.5  is set as AD input and connected to AMUXBUS_A.P9.4  is set as AD input and connected to AMUXBUS_B.

 when I only heat RT1,the voltage of P9.5 rises,the voltage of P9.4 has no change.

 when I only heat RT2,the voltage of P9.4 rises,the voltage of P9.5 has no change.

it seems when P9.3 is used as AD input,its AD value is affected by P9.4(no matter P9.4 is GPIO or AD).I dont know the reason ,please help me solve the problem cause hardware design has been finished,I can only use P9.3&P9.4 in the prj.

Hello,
I have questions about PSoC6 flash.

1. In the CY8C6247 datasheet, there is a internal memory address map.
- Auxiliary flash (EEPROM Emulation) : 32KB
- Supervisory flash : 32KB

But in the architecture TRM (Flash Geometry), it seems that the EE Emulation flash has 2 sectors (64kB total) and EE Emulation Flash has also 2 sectors (64kB total).
This is different from the datasheet.

Please let me know which one is correct.

2. What is the flash page size?
The architecture TRM says "Each region divides into sectors and pages".
There are only sectors and rows in the Figure 13-2. Flash Geometry Organization.

3. Can EEPROM Emulation only use the 0x1400000 ~ 0x14007FFF area?
Is flash physically separated according to its purpose?

Thanks and Regards,
YS

Hello.

I'm looking for a "Flash Memory" lock function.

The desired functionality is to block writing or erasing for a particular sector of Flash.

In addition to calling a specific function, I want to block the write or erase function, but is there any function implemented?

I'm using  CY8C61x6 or CY8C61x7 and Tester Kit is WIFI-BT Pioneer Kit

Thankyou for your reply

Hello 

I'm using CY8CPROTO-062-4343W

My compile environment is Modus toolbox.

I want to write one byte on flash. But Minimum unit of API is ROW(512 byte).

What should I do to write one byte?

If it is impossible, Please refer example code.

The PSOC 6 PDL includes the SegLCD but Psoc Creator has no support for it like the PSoC 4 does.  How do I go about using it?  The PSoC 6 datasheet also states it includes segment driver support.

Hi

What is the recommended retrigger delay for the I2S module ? I can't find in the module datasheet.

thanks