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Hello
I am trying with small steps to operate the DMA on I2S, so I have an array of 40 values (0 through 0x27) to write to the I2S-TX through DMA. Then I read the I2S-SDO line on logic analyzer.
First, to configure the UDB datapath to be 32-bit wide to have 4-words deep FIFO, do it just configure the data_size to "word" ? or do I have to manually configure some register ?
I set up the system as follows:
Data to send: uint32_t txBuff[40]
DMA:
I2S:
Tx-only, 24-bits, period 64-bits
DMA:
Result:
In case of I2S set to 16-bits: The output reads 2 consecutive elements from the array at a time, concatenates them and and sends them to the I2S.
In case of I2S set to 24-bits: The output reads 2 consecutive elements from the array at a time, concatenates them and and sends them to the I2S, and skips other some elements in the array:
I expired all the trials and errors and the resources in TRM and datasheets,
Any clue what is wrong with the setup ?
thanks
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PSoC 6 MCU
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Because the component was designed for PSoC 4, which has a limited number of UDBs, it uses 8-bit datapath, so you need to write byte by byte to the TX FIFO. Changing to 32-bit datapath will require some customization, not only on the datapath, but also on the Verilog code and APIs.
I think now I understand why you asked the questions from this case:
https://community.infineon.com/t5/PSoC-6/UDB-I2S-on-PSoC-6/m-p/326004#M11233
To make this work with 8-bit datapath, you need to setup the DMA to transfer byte-to-byte.
If you need 24-bits, configure the X loop to transfer 3 bytes. And let Y loop to define the number of "words". In your case, that would be 40 words. This how the configuration will look like:
For Y-loop, you need to increment by 4, since your data is stored in a 32-bit array.
Let me know if this works.
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Because the component was designed for PSoC 4, which has a limited number of UDBs, it uses 8-bit datapath, so you need to write byte by byte to the TX FIFO. Changing to 32-bit datapath will require some customization, not only on the datapath, but also on the Verilog code and APIs.
I think now I understand why you asked the questions from this case:
https://community.infineon.com/t5/PSoC-6/UDB-I2S-on-PSoC-6/m-p/326004#M11233
To make this work with 8-bit datapath, you need to setup the DMA to transfer byte-to-byte.
If you need 24-bits, configure the X loop to transfer 3 bytes. And let Y loop to define the number of "words". In your case, that would be 40 words. This how the configuration will look like:
For Y-loop, you need to increment by 4, since your data is stored in a 32-bit array.
Let me know if this works.
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