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PSoC 6

PaSw_2578827
New Contributor II

Our application uses a CY8C6247BZI, which offers the SIMO Buck regulator. That's not really applicable to our application as we will want to run at >100MHz and will almost always favor performance over power consumption. It's not clear what components need to be connected to the SIMO IO pins when the Buck regulator is not being used. Specifically regarding what (if anything) should be connected to the following pins: VBUCK1, VCCD, VRF, VDD_NS, VIN1 and VIND2.

Are there any schematic examples for an unused VBUCK?

Thanks

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Vasanth
Moderator
Moderator

Hi Patrick,

The SIMO pins VBUCK1, VRF, VDD_NS, VIN1 and VIND2 can be left floating. VCCD is Internal core regulators' (LDO) output. It requires bypass capacitor connection for proper operation. 1uF is connected on VCCD when VBUCK1 does not power VCCD. It is used as core supply input when internal regulators are OFF. Please refer PSoC 6 hardware design guide. The information regarding unused buck pins will be added in the document soon.

Best Regards,
Vasanth

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Vasanth
Moderator
Moderator

Hi Patrick,

The SIMO pins VBUCK1, VRF, VDD_NS, VIN1 and VIND2 can be left floating. VCCD is Internal core regulators' (LDO) output. It requires bypass capacitor connection for proper operation. 1uF is connected on VCCD when VBUCK1 does not power VCCD. It is used as core supply input when internal regulators are OFF. Please refer PSoC 6 hardware design guide. The information regarding unused buck pins will be added in the document soon.

Best Regards,
Vasanth

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