CY8CPROTO-062-4343W QSPI Flash access from M0+

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Scilly
Level 1
Level 1
First question asked Welcome!

I wonder if is it possible to access the QSPI Flash from M0+.

The example provided in the modus toolbox seems to use the M4 ( as there is the HAL lib that is not usable with M0 ).

Please help

 

Thanks

S

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1 Solution
DheerajK_81
Moderator
Moderator
Moderator
First comment on KBA First comment on blog 5 questions asked

Hello @Scilly ,

The CM0p is the secure processor and hence is not recommended to be used for the user application. And yes you are right, HAL is not supported on CM0p. 

But to answer your question, you can however create applications using PDL on CM0p and access the QSPI flash. Please refer to this example for dual-cpu usage: https://github.com/Infineon/mtb-example-psoc6-dual-cpu-empty-app

For QSPI Flash interfacing, use the SMIF hardware block. You can find the APIs here: https://infineon.github.io/mtb-pdl-cat1/pdl_api_reference_manual/html/group__group__smif.html

Please let me know if you face any issues.

Regards,
Dheeraj

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2 Replies
DheerajK_81
Moderator
Moderator
Moderator
First comment on KBA First comment on blog 5 questions asked

Hello @Scilly ,

The CM0p is the secure processor and hence is not recommended to be used for the user application. And yes you are right, HAL is not supported on CM0p. 

But to answer your question, you can however create applications using PDL on CM0p and access the QSPI flash. Please refer to this example for dual-cpu usage: https://github.com/Infineon/mtb-example-psoc6-dual-cpu-empty-app

For QSPI Flash interfacing, use the SMIF hardware block. You can find the APIs here: https://infineon.github.io/mtb-pdl-cat1/pdl_api_reference_manual/html/group__group__smif.html

Please let me know if you face any issues.

Regards,
Dheeraj

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ARH
Level 3
Level 3
10 replies posted 5 replies posted 5 sign-ins

 

For sure you can...  but why?

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