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PSoC™ 5, 3 & 1 Forum Discussions

RoRo_4659551
PSoC™ 5, 3 & 1
Hi, I am trying to configure multiple pins connected to interrupts but I receive an error [see attached pictures].       Thanks, Roy Roif   @Motoo_Tanaka... Show More
CaDu_3933941
PSoC™ 5, 3 & 1
Hi all,   I am currently working on a project that requires the logging of some events. This requires more capacity than that provided by the EEPROM s... Show More
user_4495571
PSoC™ 5, 3 & 1
Hi, after updating the Programmer App it asked for updating the MiniProg 4 firmware. I made the mistake to agree. Now, I'm no longer able to connect t... Show More
hata_3396041
PSoC™ 5, 3 & 1
Hello I have additional questions about this thread. It would be very helpful if you could answer by 5/10. There was a reply that you should develop u... Show More
GrCa_1363456
PSoC™ 5, 3 & 1
Using a PSoC 5 kit, CY8CKIT-059, the I2C running at 100kHz occasionally locks up at extreme cold ~ -25 to -40. Are there know issues with the PSoC 5 a... Show More
PrGa_4677506
PSoC™ 5, 3 & 1
dear all,       I am into writing a PSoC 3 based program wherein I have to control the period of a wave form using data obtained from UART. I have cre... Show More
linardsee
PSoC™ 5, 3 & 1
Hello, I need to implement USB mass storage device (using MSC class) on PSOC CY8C5267LTI-LP089 chip. For storage I am going to use SPI flash. Thanks t... Show More
DaBa_1448511
PSoC™ 5, 3 & 1
I had placed all my components in my project based on CY8CKIT-059, including a Capsense linear slider, using five PSoC pins diplexed, resulting in ten... Show More
Dudi_Ildis
PSoC™ 5, 3 & 1
We are using the UART with the HW fifo of 4, we find that when disabling interrupts for long time (not for 4 fifo long), we start to loss bytes someti... Show More
PaFi_4802396
PSoC™ 5, 3 & 1
I am trying to create a master SPI using PSOC 5. For debugging purposes I've set the clock to be 5 Hz (so I can track the sent and received data in re... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.