PSoC™ 5, 3 & 1 Forum Discussions
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Hey,
I found this document from cypress on the implementation of DALI:
http://www.cypress.com/file/106181
But I cannot find any DALI library files online or in the examples.
Are there libraries available for the implementation of DALI? I am making a DALI slave device ( Control Gear)
Thank you,
Niek
Hai,
I would need some help on transferring data by SPI Master with DMA.
Sending data works very well, all the data in txBuffer is sent.
However, I do not receive the data that I am expecting from the slave.
I am expecting a lot of 0x8000 and some measures in the table rxBuffer :
However, I received a lot of 0x0000 and some measures that do not really make sense to me in the table rxBuffer when I read the table in debug mode :
Here is the configuration of my SPI and DMA :
Hardware request is "Level" because rx interrupt is always at high level.
Attached below is my project, does anyone have an idea what can cause this ?
Show LessBelow source code is that sends decimal 65 to the terminal with USBUART by USBUART_1_PutData or USBUART_1_PutString function.
In my understanding, 6 and 4 are encoded as ascii 54 and 52 respectively and sent to the termnal,
and then the terminal decodes the values of 6 and 4 with this ascii code and finally displays 64 on the terminal
Can I send decimal 65 to the terminal as number 65 without encoding with ascii?
At this time, I suppose that 'A'(ASCII code:65) may be displayed on the terminal.
Arduino has Serial.print and Serial.Write funciton.
If you write Serail.print(65), 65 is displayed on the terminal and Serial.write(65) show charater 'A'.
Is there a function in PSoC 5LP can write binary data to serial port like Serial.write() of Arduino?
I would appreciate if you let me know if there is any possible way.
-------------------------------------------------------------------------------
uint8_t wrBuffer[USBUART_BUFFER_SIZE];
uint16_t rtnCmd = 65;
sprintf((char *)wrBuffer,"%d",rtnCmd);
USBUART_1_PutData((uint8 *)wrBuffer, strlen(char *) wrBuffer));
Show LessI want the release output in intel hex and binary format. Please tell me what all changes need to be done in build settings to get the binary and intel hex output format.
Show LessHi,
I am using 2 PSoCs one with timer that detects a pulse [PSOC1] and the other which gives the pulse[PSOC2]. I am using drive mode of the pin[RX] as HIGH IMPEDANCE DIGITAL for PSOC1 and the pin [TX] as STRONG DRIVE for PSOC2. In this case some of the pulses are not detected by PSOC1. When I set the PSOC1 TX Pin to Open drain drive low and add an external pull up. There is no missing of the pulses. Can you tell me what went wrong with the first case of using it without a pull up as STRONG DRIVE .
Note : The initial drive state of both pins are set as high.
For the timer to detect the pulse I am using trigger for falling edge and an interrupt to detect the raising edge.
Show LessUsing the CY8C29466, watchdog enabled, sleep timer = 1Hz. Watchdog reset approximately every 5mS with RES_WDT = 0x38; to ensure 3 second timeout. Very occasionally the watchdog resets the system. You could be forgiven for thinking, well it's doing it's job then, your code is crashing somewhere. However code is really quite simple, and if I take the watchdog out, nothing bad happens. Has anybody seen this before?
Show LessHi all,
I've got a product that's been in production for about 5 years without issue but we're suddenly having a lot of failures and I have traced the problem to at least one specific date code of 5LP.
The issue is that when the chip transitions from active mode to low power standby, it will spontaneously reset rather than just entering the low power state as chips prior to this date code would do.
Has anyone else seen issue like this of late?
Thanks.
Show LessHey all,
I have a project I'm working on for PSoC5LP where a typical TTL high/low signal (a POWER_OK signal) is generated by the PSoC after a hardware event (3 POWER_GOOD signals all logic high) occurs. The catch is that the output signal must be delayed before outputting to a PSoC GPIO. Not a quick delay like a debounce, but between 500ms and 1s from the signals all being high to PWR_OK asserting high. Doing something like this in firmware would be pretty simple, but I wanted to accomplish this in hardware. Here's what I came up with myself, using a control register to simulate the POWER_GOOD signals:
The above solution will delay both the rising/falling edge of the ANDed POWER_GOOD signals from appearing on PWR_OK until the timer period has elapsed, and seems to work well enough, although it's not completely in hardware (the timer must be enabled in firmware). I'm curious if this is the best way to go about it, of if this could be done more simply or in a more flexible fashion (I.E. would it be possible to modify this so only the rising edge or falling is delayed, but the other is instant?).
Thought this might be an interesting problem to share and see what people can come up with.
Show LessGood morning,
As a beginner, I am using a PSoC 5 LP.
I am trying to use SPI communication with DMA to send words of 2bytes.
However I have this problem of Chip Select Signal
Here are my program and my configurations :
#include <project.h>
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////
void DmaTxConfiguration(void);
void DmaRxConfiguration(void);
/* DMA Configuration for DMA_TX */
#define DMA_TX_BYTES_PER_BURST (2u)
#define DMA_TX_REQUEST_PER_BURST (1u)
#define DMA_TX_SRC_BASE (CYDEV_SRAM_BASE)
#define DMA_TX_DST_BASE (CYDEV_PERIPH_BASE)
/* DMA Configuration for DMA_RX */
#define DMA_RX_BYTES_PER_BURST (2u)
#define DMA_RX_REQUEST_PER_BURST (1u)
#define DMA_RX_SRC_BASE (CYDEV_PERIPH_BASE)
#define DMA_RX_DST_BASE (CYDEV_SRAM_BASE)
#define BUFFER_SIZE (18u)
#define STORE_TD_CFG_ONCMPLT (1u)
/* Variable declarations for DMA_TX*/
uint8 txChannel;
uint8 txTD;
/* Variable declarations for DMA_RX */
uint8 rxChannel;
uint8 rxTD;
uint16 txBuffer [BUFFER_SIZE] = {0x0000, 0x0100, 0x0200, 0x0300, 0x0400, 0x0500, 0x0600, 0x0700, 0x0800, 0x0900, 0x0A00, 0x0B00, 0x0C00, 0x0D00, 0x0E00, 0x0F00, 0x4000, 0x4000};
int16 rxBuffer[BUFFER_SIZE];
/*******************************************************************************
* Function Name: DmaTxConfiguration
********************************************************************************
* Summary:
* Configures the DMA transfer for TX direction
*
* Parameters:
* None.
*
* Return:
* None.
*
*******************************************************************************/
void DmaTxConfiguration()
{
/* Init DMA, 1 byte bursts, each burst requires a request */
txChannel = DMA_TX_DmaInitialize(DMA_TX_BYTES_PER_BURST, DMA_TX_REQUEST_PER_BURST,
HI16(DMA_TX_SRC_BASE), HI16(DMA_TX_DST_BASE));
txTD = CyDmaTdAllocate();
/* Configure this Td as follows:
* - Increment the source address, but not the destination address
*/
CyDmaTdSetConfiguration(txTD, (BUFFER_SIZE*2), txTD, TD_INC_SRC_ADR);
/* From the memory to the SPIM */
CyDmaTdSetAddress(txTD, LO16((uint32)txBuffer), LO16((uint32) SPIM_BSPIM_sR16_Dp_u0__16BIT_F0_REG));
/* Associate the TD with the channel */
CyDmaChSetInitialTd(txChannel, txTD);
}
/*******************************************************************************
* Function Name: DmaRxConfiguration
********************************************************************************
* Summary:
* Configures the DMA transfer for RX direction
*
* Parameters:
* None.
*
* Return:
* None.
*
*******************************************************************************/
void DmaRxConfiguration()
{
/* Init DMA, 1 byte bursts, each burst requires a request */
rxChannel = DMA_RX_DmaInitialize(DMA_RX_BYTES_PER_BURST, DMA_RX_REQUEST_PER_BURST,
HI16(DMA_RX_SRC_BASE), HI16(DMA_RX_DST_BASE));
rxTD = CyDmaTdAllocate();
/* Configure this Td as follows:
* - Increment the destination address, but not the source address
*/
CyDmaTdSetConfiguration(rxTD, (BUFFER_SIZE*2), rxTD, TD_INC_DST_ADR);
/* From the SPIM to the memory */
CyDmaTdSetAddress(rxTD, LO16((uint32)SPIM_BSPIM_sR16_Dp_u0__F1_REG), LO16((uint32)rxBuffer));
/* Associate the TD with the channel */
CyDmaChSetInitialTd(rxChannel, rxTD);
}
However, my Chip Select signal doesn't seem to agree with what I want it to do.
As what I have understood, #define DMA_TX_BYTES_PER_BURST (2u), it should send 2 bytes and I should have a chip select pulse, however, it sends 4bytes and it gives me a pulse on chip select .
Sorry if I have misunderstood this, but anyone has an idea what can I do ?
Show LessI am using the PSOC1 I2Cm (software) user module. This I2Cm is placed on P[1,2] SDA and P[1,6] SCL. This works fine after initiating an "I2Cm_Start();" instruction, but once I touch any other pin on Port 1 (like setting an LED ON/OFF) the I2Cm stops working. I would need to restart the I2Cm module. This is not desirable, so what is happening here and is there a work around?
Show Less