PSoC™ 5, 3 & 1 Forum Discussions

Hi,

Im having difficulty reducing the code spread on a simple DC voltage measurement using the Delta Sigma ADC on the PSOC 5 CY8C5588AXI-060 my simple test is outputting the converted codes via UART to my PC to examine the results. DC Voltage measurements are yielding code values with spreads from 50-200 codes!

I have tried passing the results through an FIR Filter, as well as using an external voltage reference and external clock source. I have even tried to use a Bypass decoupling capacitor on the internal voltage reference as the data sheet said this may help. The code spread improves slightly when the FIR filter is used:

ADC Configuration: MultiSample (Turbo), 16 Bit Resolution, 1000 SPS, VSSA - 2.048, Bypass Buffer

Filter Configuration: 1 ksps, 1 Filter Stage, Blackman, Lowpass, 120 Taps, 0.1 kHz, Data Ready Signal on Interrupt Request.

@1.2 V input to the ADC taking 1000 Samples

No Filter, Internal VREF (1.024): 380000 - 38100

Filter, Internal VREF (1.024): 37980 - 38060

Filter, Internal VREF (1.024), External Clock (250 kHz): 38120 - 38180

Filter, Ext Vref (1.024), External Clock (250 kHz) 38120 - 38165

My main issue is that i have no benchmark to compare against! How low is the ADC code spread actually capable of going on a simple measurement such as this? is there an optimal configuration for reducing this?

Thanks for your help!

Hi,

I am trying to implement a USB microphone (for testing both ADC accuracy and USB feature) device, the PSoC enumeration is working fine.

I am not able to find any documentation on how to implement the ISO data transfer. I tried using USBFS_1_LoadInEP API which does not work. Surprisingly the device does not even raise any interrupt nor it used the endpoint buffer for data ISO data transfer.

Also the device is sending empty packets when I start recording in PC, I am not sure which data buffer to use for this data transfer.

Please let me know if any one has used ISO transfer. Any advice on how should I proceed?

Regards,

Ash 

Dear Cypress friends,

Part 1: I am interested in being able to sychronize the RTC to an external  1 pulse per second GPS signal.

If possible, I would like to be able to have fairly quick synchronization between RTC and the GPS signal.

Part 2: I would also like to be able to create Years:Months:Days:hours:seconds: and also subseconds.

The RTC gives me all but the subseconds. Is there a straight forward way to do this but taping into a prescaler of the RTC?

I would be very grateful for any feedback,

kind regards,

John

I added user module PWM8 3 times

PWM1, PWM2,PWM3

I wrote following code

typedef void (* const Function_Pass_Char)(char i);

static Function_Pass_Char SET_PWM[] = {
    &PWM1_WritePulseWidth,
    &PWM2_WritePulseWidth,
    &PWM3_WritePulseWidth,
}

void main(void){

SET_PWM[0](50);

}

code compiles fine, but the PWM(Pulsewidth value is not passed into A when calling the asm function

 PWM1_WritePulseWidth:
_PWM1_WritePulseWidth:
   RAM_PROLOGUE RAM_USE_CLASS_1
   mov   reg[PWM1_COMPARE_REG], A                          using debug window register shows different value!!!???? not(0x32)
   RAM_EPILOGUE RAM_USE_CLASS_1
   ret
 

Any ideas???

Hi,

What is the availability and price for PSoC5 devices?

So far I am not able to find any info online or from distributors.

Regards

Jan

Hi All,

I need assistance with multiple TDs in single DMA chanell.

I want to use one DMA chanell for sending data to VDAC (TD1 for VDAC1 and TD2 for VDAC2).

Data is stored in two arrays: 32 bytes wide each.

Is it posible to send only one byte to VDAC1 and one byte to VDAC2 per rising edge on DMA drq?

 I'm getting only full array send on VDAC1, than on VDAC2.

Regards

Alex Che.

 Hello,

1) I am working with the CY8C3866AXI-040 (100-TQFP) chip that is the standard module on the PSoC 3 DVK-001. This chip is the production chip. It appears that on my DVK, the Vadj voltage CAN'T be brought lower than 2.0V. Is this part of the design/correct?

2) I want to assess the ability of the PSoC 3's I/Os to reach their stated ability of 1.2V lower range. However, online sources say that this can only go as low as 1.8V. Which is true?

3) Is there any change in slew rate or drive characteristics at lower voltages? Is there anything I should know about this when designing with low I/O voltages?

3) What is the frequency limit on the PSoC 3's I/O pins? I understand that there is a different input/output frequency limit. However, I don't understand why this is, and what the limitations are.

Thanks,

DiodeDan