PSoC™ 5, 3 & 1 Forum Discussions
Hi,
I've source code for specific usage of CY8C21223 chip for an application and circuit drawings.
How can I compile and program CY8C21223 chip? From the documentation, I undestand that PSoC Designer is needed and C compiler already included free. However, which kit do I need?
- CY8CKIT-001 PSoC® Development Kit - 249 USD,
- CY8CKIT-002 PSoC® MiniProg3 Program and Debug Kit - 89 USD
- CY8CKIT-014 PSoC® FirstTouch™ Starter Kit - 49 USD
Small modifications to C program may be needed, but not a major change or re-design is expected.
If I buy CY8CKIT-002, will it be enough?
Regards,
Murat
Show Lesshttp://www.cypress.com/?rID=2543
On this webpage, you can learn the software, kits along with the programming specs across PSoC 1, 3 and 5 families. The list of Cypress qualified production programming vendors is also posted here.
Show LessThe PSoC Programmer 3.13.1 release is a patch update provided support for the advanced release of PSoC Creator 2.0 and still supports PSoC Designer 5.1 SP2 releases.
This release of PSoC Programmer is available through the PSoC Programmer web page and through the CyInstaller Update Manager.
Please navigate to the Programmer Page for the installer and Release Notes.
www.cypress.com/go/psocprogrammer
The new features included with this release includes: update to support the Write Once Latch feature, new PSoC1 CapSense Device Support (CY8C20xx6L), etc.
Show LessCan anyone instruct me or point to the relevant document for changing the clock frequency supplied to the 8051 core in PSOC 3
Whats the maximum it can support??
Show LessCypress will have a big booth next week at the Embedded Systems Conference in Boston. The expo hall is open on Tuesday and Wednesday of next week (Sept 27th & 28th).
If you're in the area, stop by. I'll be working the booth both days. For more information, or to register (for free) visitwww.cypress.com/go/esc.
-Bobby
Cypress will have a big booth next week at the Embedded Systems Conference in Boston. The expo hall is open on Tuesday and Wednesday of next week (Sept 27th & 28th).
If you're in the area, stop by. I'll be working the booth both days.
-Bobby
Show LessPlease visit www.cypress.com/go/psoc3 to access product info.
Hello
I have the following problem : with a signed square numeric input on HOLDAH register and an offset on the output, looks like the filter does not deal correctly with overshots. (scope picture attached).
Please note that the offset out of DMA was done with a register and a not gate (picture attached)
I attach my project too.
if I am right, the filter is not reliable,
could anybody help ?
best regads jean
Show LessHello all,
I feel like someone has probably asked this question already, but I couldn't find it, so apologies if this is a duplicate.
After reading the datasheet, my understanding is that to avoid the nonlinearities near the rails, the ADC attenuates the input by 10% then applies a gain of 1.11 afterwards. Since you can still drive it to the rails, the output can exceed the specified ADC resolution. This is a problem as I want to sample 16-bit data (which actually returns 17-bits). The datasheet suggests that I read a 32-bit value to account for potential overflow. This is less than ideal, as I am trying to buffer quite a bit of data and can't afford to fill half my memory with zeros. I could also look at each sample as it is collected and apply the clipping in an ISR, but I would very much prefer not to do that and to use DMA instead.
Another option is to collect 15 bits instead, so I know it will safely fit in 16 bits. This presents me with other problems as 15-bit sampling requires a higher sampling rate than 16-bit which doesn't fit within my timing scheme. Plus I'd be wasting a bit that will only be used 0.0001% of the time. Since I'm not interested in measuing values beyond the rails, my preferred solution is to find a way to clip the output so that rather than using 17 bits, the output will saturate at 16 bits.
In short: Is there a way to automatically clip (saturate) the 17-bit output of the 16-bit ADC to guarantee it will fit in 16 bits? If there is no easy way, any suggestions on the best path to the hard way? This chip has an incredible amount of configurabililty that I'm still learning, but it seems like there is probably a solution in the configurable logic.
Thanks for your help,
-- Jonathan
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