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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
Cypress Semiconductor has completed a hardware update to the Miniprog3 to address hardware issues seen with programming, ESD, and power management. Th... Show More
Anonymous
PSoC™ 5, 3 & 1
Cypress Semiconductor has completed a hardware update to the Miniprog3 to address hardware issues seen with programming, ESD, and power management. Th... Show More
Anonymous
PSoC™ 5, 3 & 1
 I am trying to interface the TMP141(Datasheet,in PDF) temperature sensor that uses a 1 wire protocol,(quite similar,_not_ identical though.. to the o... Show More
Anonymous
PSoC™ 5, 3 & 1
     Interrupts are an important part of any embedded application. They free the CPU from having to continuously poll the occurrence of a specific eve... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello,    I'm going to use  a 2,8V littium battery in order to supply the PSoC3 core with 1,8V through its own internal Analog and Digital Regulators.... Show More
Anonymous
PSoC™ 5, 3 & 1
Mini Prog3
solved msg Solved

我这两个月连续用坏了两个Mini Prog3 ,都是在烧写程序时坏的,想知道为什么,坏了的原因是VTARG 与GND 短路了,有没有什么解决的办法啊?

Bob_Marlowe
PSoC™ 5, 3 & 1
I would like to have a word to all those newbees who are going to start or already started with a PSoC1 kit and now try to dig into the system. The ki... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hello,    Can DMA be setup between (FLASH / SRAM)  memory and GPIO?    My requirement is:    1K data is stored in memory (FLASH / SRAM)    Want to fl... Show More
Anonymous
PSoC™ 5, 3 & 1
PSoC®3 and PSoC®5 devices feature a Direct Memory Access (DMA) engine, which can used for data transfer between on-chip elements without any CPU inter... Show More
Anonymous
PSoC™ 5, 3 & 1
     Interrupts are an important part of any embedded application. They free the CPU from having to continuously poll the occurrence of a specific eve... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.