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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
 Hello,    In CapSense CSD (PSoC3), Sensor Auto Reset is very useful, but too fast for my applications. Is there any way to change the time in which s... Show More
Anonymous
PSoC™ 5, 3 & 1
Error
solved msg Solved
hi to all,     I am getting the error and unable to over come .can any suggest .    thanks     PRP         -------------------------------------------... Show More
Anonymous
PSoC™ 5, 3 & 1
syntax
solved msg Solved
hi to all,                  can anybody help me :The equivalent syntax for M8C_ClearWDT  in PSoC 3.         Thanks    PRP Show More
Anonymous
PSoC™ 5, 3 & 1
 i'm in a dilemma whether to use the internal default ISR or a user defined one when my RX buffer size is greater tha 4 bytes and when i tried using t... Show More
Anonymous
PSoC™ 5, 3 & 1
 I have a condition where in after running the project for say 30hrs or so the project execution goes wierd. I suspect a stack overflow because , when... Show More
Anonymous
PSoC™ 5, 3 & 1
 In a project , I have configured DMAs TD to transfer 3 bytes of data.    The source is uint8 Temp_Data[0], basically an array of "2" bytes and i am i... Show More
Anonymous
PSoC™ 5, 3 & 1
 I was looking for building a board for PSoC3, the boards  Cypress provides are high end boards not afforable for students.    What is the starting po... Show More
Anonymous
PSoC™ 5, 3 & 1
GPIOs can provide only 4mA of current and sink 8mA. Can I connect multiple pins to generate a current of more than 4mA.    So, if i want a current of ... Show More
Anonymous
PSoC™ 5, 3 & 1
I liked the Glucose Meter Demo video www.cypress.com/?rID=43800 but there is no reference design, schematics or project based on the video.      The v... Show More
Anonymous
PSoC™ 5, 3 & 1
 How can i write some data from SRAM to buffer of SPI . Buffer here refers to FIFO . So once i write a value to this buffer then I can transmit data f... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.