PSoC™ 5, 3 & 1 Forum Discussions

Hello,

I use a PSoC3 (CY8C3246PVI-147) on a PCB to drive brushed motor drivers. I'm experiencing some problems using the PSoC when it receives some external electrical discharges: the PSoC momentarily shuts down, blocking communication and also the movement of the motors.
Are there any measures that can be taken outside the PCB or through-hole components so that these discharges can be 'discharged' directly without shutting down the PSoC?
Thank you for your help.

Hi, 

The datasheet for the I2C block shows the following code for manual read. However, how can I read from a specific register?

The I2C_MasterSendStart includes the slave address, but I don't see the register address being called out. 

Example Code:

status = I2C_MasterSendStart(0x08, I2C_READ_XFER_MODE);
if(I2C_MSTR_NO_ERROR == status) /* Check if transfer completed without errors */
{
/* Read array of 5 bytes */
for(i=0; i<5; i++)
{
if(i < 4)
{
userArray[i] = I2C_MasterReadByte(I2C_ACK_DATA);
}
else
{
userArray[i] = I2C_MasterReadByte(I2C_NAK_DATA);
}
}
}
I2C_MasterSendStop(); /* Send Stop */

Dear Community,

Do you have any idea how to remove the unused noise and unwanted half-signal risings from this signal? On the picture below you can see the signal, and you can notice the true heart beats, and the unwanted part of the data.

I am working with a 16 sized circular buffer, every time a new data comes, I push it into the circular buffer. I want to make the filtering without using any top design element, so only with "C code". The hardest thing in the filtering is, that every person has his/her own heart rate, and the light absorption (which is the method of how it works) can be different by person, so implementing fix [Hz] filters might be dangerous, because of the fact that the data can change suddenly if other person uses the sensor.

Thank you for the ideas, and I also accept example C codes for doing this filtering 🙂 .

Happy easter,
Ben

I'm using the 32-bit Quad Decoder in PSoC 5LP (CY8C56LP family).

It works based on a 16-bit Quad Decoder in hardware and the PSoC generated code for the corresponding 32-bit counter.

I've selected "counter resolution 1x" and "Use input index" (but not "Enable glitch filter").

The maximum clock for the component based on the datasheet is about 30 MHz depending on the selections,
and the maximum input data rate for AB signals is always one tenth of the clock.

Having used the chip at maximum master clock frequency (80MHz), the closest clock I can provide to the Quad Decoder component is 80/3 = 26.66 MHz,
and so 2.66 MHz is the maximum input data rate for AB signals.

The PSoC generated code (ISR) updates the most significant 16-bits of the 32-bit counter value upon receiving an interrupt from the 16-bit component.

The interrupt is be triggered when there is either an overflow, an underflow or a reset event in the 16-bit counter.

There is only one Interrupt output signal from the hardware component for the three possible events,
which makes it almost impossible to put together a 32-bit Quad Decoder purely in the hardware.

There are a few questions which I can't find an answer for in the datasheets.

1. What happens if there is a number of phase changes in AB signals in fractions of micro seconds when the 16-bit counter is 0 or 65535?
I expect the interrupt signal can still catch up with these changes but doubt it whether the ISR can catch up with all of the events?
In every ISR the status register is read and cleared, and it's set again if there is a second event in the middle of the ISR being executed,
but if there is a third event as well and overwrites the status register, would we loose the second event in the status register?

2. How long (maximum) the ISR would take to complete (for master clock at 80MHz)?

3. If I decide to use a 16-bit Quad Decoder and implement the 32-bit counter myself in firmware,
I need to know how long does it take for each Write to the 16-bit counter? does it loose the incoming AB signals during the write?

4. There is note in the datasheet that the Quad Decoder might work with higher clocks but it's up to the user to confirm it,
how can I confirm it? If I provide to the Quad Decoder component with 80/2 = 40 MHz clock, how and how long I need to run a test to confirm it's all working?

4. My project gets even more challenging as I have three of these 32-bit Quad Decoders,
and at the same time use all 6 HID USB interrupts (of course at lower priorities).
Finally, based on the challenges I described, any ideas why my 32-bit counter value jumps up or down by 65535 a few times during a 24 hours test?

Thanks in advance for any advice/solution.

hello ,

I have some problems with getting the angle from the gyroscope of the MPU6050. I am doing the following:

GyroX0 = GyroX; // previous Gyro value
GyroY0 = GyroY; // previous Gyro value
GyroZ0 = GyroZ; // previous Gyro value
        
GyroX = mybuf[3]/131.07; // Current Gyro value
GyroY = mybuf[4]/131.07;// Current Gyro value
GyroZ = mybuf[5]/131.07; // Current Gyro value
        
GyroX = GyroX - GyroErrorX; // Current gyro - error value from MPU6050
GyroY = GyroY - GyroErrorY; // Current gyro - error value from MPU6050
GyroZ = GyroZ - GyroErrorZ; // Current gyro - error value from MPU6050
        
GyroRateX = GyroX - GyroX0; // get rate of change by Current Gyro - old Gyro
GyroRateY = GyroY - GyroY0; // get rate of change by Current Gyro - old Gyro
GyroRateZ = GyroZ - GyroZ0; // get rate of change by Current Gyro - old Gyro

//Delta time is ms =>  ms /1000 = s
gyroAngleX = gyroAngleX + GyroRateX * (DeltaTime/1000.0); 
gyroAngleY = gyroAngleY + GyroRateY * (DeltaTime/1000.0);
gyroAngleZ = gyroAngleZ + GyroRateZ * (DeltaTime/1000.0);    

 The function for deltatime you can find here.  The full project is also avaible is the fille attached .

Can someone help??

Dear Sir/ Madam

I have some technical problems when used Cy8c38xxx family processor module. When i tried to program the chip by clicking the program/debug button, it can not be programmed. An error message displayed which is "Warning: dbg.M0039: There was an error running port acquire.  There may be no devices attached, or a device may be in use by another application". Then i tried to reduce the clock speed but it still didn't work. I used CY8CKIT-001 Development Kit. 

Do you have any suggestions?

Or, Is PSoC 3 can not be used more?

Thanks and Regards

Part is CY8C27543-24

We are seeing some variations in ADC operation between parts in production that look to be bigger than expected, so I am Assuming the internal reference is at fault here.

Data sheet says this

What exactly does"trimmed for appropriate VDD mean" Using 5.0v here.....

Designer 5.4 chip editor shows this:

Which is a +/- 1.6 volt reference.. does not comply with data sheet?

If I read the DELSIG11 data sheet right it tells me I can expect a 3% error with this reference...Is this true, this equates to about a 64 tick difference, way too much..

So basic question is how good is this overall system and what can I count on? What kind of tick accuracy over temp range 0-70C