PSoC™ 5, 3 & 1 Forum Discussions
Hello @MotooTanaka san and @Len_CONSULTRON ,
While trying to update data to a ThingSpeak channel using PSOC5 LP and ESP, I have tried using the "CIPSTART" command to connect to the particular IP address of ThingSpeak and the response from the server was also "CONNECT OK" which means that the link is established, but there is a sprint() statement after, which is responsible for updating the value to the certain channel and field using the APIKey, but the control never reaches this sprintf() statement in the ESP_Send_Data() function in the firmware (I have tested this using CySoftwareReset() API at two positions in the ESP_Send_Data() function, one at line 143 (which resets the firmware and executes from start) and at 146 (which never works)).
I have attached the firmware bundle and the Error log (ESP_CIPSTART_ERROR_LOG.docx) in the thread.
Please advise on why is the control stuck after the CIPSTART line, even though there is a "CONNECT OK" response from the server?
Any help would be appreciated.
Regards,
Yash
Hi,
Some time ago I could add CMSIS library with the help of @Rakshith (see the post here). His instructions were clear and since then I can run projects with the CMSIS library included. Now, what I want to do is to understand and remove the warning that I get every time I compile my projects with CMSIS.
The warning I receive says "__VTOR_PRESENT not defined in device header file; using default".
As far as I know, PSoC projects don't include a <device.h> header, but a <project.h>. And I am not sure if I have to modify something there or what exactly I have to do to get rid of this warning.
Thanks for comprehension and time.
Show LessI have part number CY8C20234 which is a PSoC 1. I need to use an IDAC. Is there a way to re-purpose something in Capsense or elsewhere or any way to make an IDAC?
Show LessLike the CPU frequency for a CPU, how to find out at what frequency the PSoC is running?
Regards,
Winston
Is anyone familiar if the 5868 typically used for programmer/debugger on the dev boards is locked or can these be repurposed?
Kyle
Hi Community,
I am currently using the PSoC5 filter block in a design.
The process I want to implement is:
ADC -> bandpass filter -> take absolute value of output -> low pass filter -> desired output
Therefore, I currently have an interrupt on end of conversion of ADC which writes the ADC value into CHANNEL A of a filter block which is designed as a bandpass filter. I then implement a check of if values are below zero, and if they are I mirror them to take the absolute signal. Up to this part is fine.
I then want to write the absolute signal into a low pass filter which I have setup in CHANNEL B of the filter block. However when I read results from channel B, I just get 0's. I was wondering if it is possible to stream the filtered value from channel A into channel B? Or if anyone has any suggestions.
I have attached my project files in a compressed zip folder.
Thanks,
mwors7
Show LessHello,
If anyone has succeeded in interfacing PSOC 5LP with an ESP-01 module, a sample to get started with, would be a great way for me to start.
Also, for now, the main application is to use PSOC as a pass-through between the PC and ESP module and later on develop the firmware to initialize and connect the ESP to the internet using just PSOC.
USE CASE:
One of the PSOC's UART (UART_1) will be connected to the PC and accept commands like "AT", etc..., from the PC terminal and then forward the data to the ESP connected over the UART_2.
Once the ESP receives the command, the ESP responds with a reply (like "OK") and PSOC needs to read this response from UART_2 and pass it along to the PC terminal over UART_1.
It would be great if anyone could help me with this one.
Thanks and Regards,
Yash
Hey all,
I'm trying to track down the cause of some PSoC5LP firmware running into the default interrupt with errno==ENOMEM.
The only way I've been able to reproduce it is to power cycle the PSoC quickly enough after powerup to catch it, and even then I've only been able to get it to occur maybe once every 50 or so cycles. This makes using the debugger to track it down basically impossible from what I can tell. It almost seems like it might be occurring when the PSoC is undervolted due to very quick loss and re-application of main power, so some "undefined behavior" might be occurring. I know PIC MCUs I've worked with have a "Brownout Reset" function to automatically put the MCU into reset when VDD falls beneath a certain configurable voltage. Does PSoC5LP have anything comparable?
I am running some BIT test on bootup in this firmware and *suspect* it occurs when I manage to power cycle/brownout the system while it is in progress of running these tests. Specifically, I am running an SRAM March Test, a Stack March Test, and a Flash ECC Test on bootup. The code for all these tests was taken from the examples in AN78175 (I made a thread about it months ago, actually: https://community.infineon.com/t5/PSoC-5-3-1/PSoC5LP-Using-SRAM-test-functions-from-AN78175/m-p/283692#M45177).
Right now when I manage to trigger the problem and enter the trap ISR for ENOMEM, I simply have it infinitely loop and blink an LED. I wonder if it would be worth it to try and hunt the exact error cause down. My other thought is that this occurs so infrequently and might be unavoidable enough, to just perform a software reset in the handler and call it a day?
I'd love a second or third opinion on maybe how I should track this down/handle it.
Thanks!
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