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PSoC™ 5, 3 & 1 Forum Discussions

GeHa_294711
PSoC™ 5, 3 & 1
We have been doing development with CY8C55 chips, then were forced to go to CY8C58LP chips as the old ones became obsolete. Upgrading from Creator2 to... Show More
Anonymous
PSoC™ 5, 3 & 1
Hi, I am new to PSoC programming, and I have encountered some confusing behavior. I have a PSoC5 LP device, and I'm trying to develop a parallel inter... Show More
Keerthy_V
PSoC™ 5, 3 & 1
 Hi,         Attached code demonstrates how to take the recived data inside UART ISR. Following steps needs to be performed on PD 5.3 for the same.   ... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hi,         As part of our firmware upgrade (previosuly used external SPI Flash), I am using the upper two arrays (2,3) of a PSOC 5LP to store a new ... Show More
Anonymous
PSoC™ 5, 3 & 1
Good Morning, How i do my first communication UART to PC?, I need read 4 bytes, and the pc send me these in a buffer. Show More
Anonymous
PSoC™ 5, 3 & 1
Dear All,    I couldn't find any timing information (number of clock cycles) for a single byte DMA transfer. How many clock cycles are needed between ... Show More
Anonymous
PSoC™ 5, 3 & 1
 I've a project with I2C (slave and fixed function) and an ADC_SAR_Seq with many differential inputs (about 20).    ADC works perfect without cpu work... Show More
Anonymous
PSoC™ 5, 3 & 1
I made a project with UART to try high level APIs for command mode. UART clock is derived from VC3 for 1200bps. The code is from the UART's data sheet... Show More
Anonymous
PSoC™ 5, 3 & 1
DEVICE: CY8C5868AXI-LP035    I am using PSoC Creator 3.0 for my design and I was interested in SAR ADC component. In the example project of ADC_SAR_Se... Show More
Anonymous
PSoC™ 5, 3 & 1
        Hello together. Based on the IQ_DSS from User PSoC73 ( http://www.cypress.com/index.cfm?app=forum&id=2492&rID=88149 ) i realize a simple numer... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.