PSoC™ 5, 3 & 1 Forum Discussions

After much trial and tribulation, I was able to get a design with several UDB counters and USBFS to route properly.  All Capture interrupts are occurring all the time, on a PSoC 5, along with using USBFS.

The key was to generate all of the timers and the rest of the design first.  After that, you can add the USBFS to the mix, and everything works.

If the USBFS was placed into the design first, then there were clock skew issues, and the input clock to the counters could only be about 12 MHZ.

  Also, if you want to debug faster and you are also using any fx2 based usb device, do the design in PSoC creator 3.3 or 4.0.  4.0 is much slower than 3.3, but 4.1 is glacial under certain circumstances.  However, the user interface to setting up the USBFS device is *much* better in PSoC creator 4.1.

Hello Forum,

i have made an 4 Channel-DMX Receiver with the PSoc5 Kit and it works fine with Interrupt based Code:

CY_ISR(ISR_DMX1)
{
    // Check for break
    if((UART_1_ReadRxStatus() & UART_1_RX_STS_BREAK) != 0)
    {
        DMX1Pointer = 0;
    }
    else //Read the Byte and store it in the Array
    {
        DMXIn1[DMX1Pointer] = UART_1_ReadRxData();
        DMX1Pointer++;
    }
}

Now i want to do this with DMA. I think there is no Problem to store the Bytes, but how do i reset the Stream when a Break of the UART is detected?

Günter

In my project, I need to have multiple ports of IO expander CY8C9560A simultaneously configured as output .

I would like to know whether the status of a port will remain valid if a different port is selected using repeat start feature of I2C?

In the datasheet of CY8C9560A, it is mentioned that the drive mode register must be configured for PWM output, but not mentioned specifically for GPIO operation.

Do the drive mode registers need to be configured for GPIO operation also?