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PSoC™ 5, 3 & 1 Forum Discussions

AlVa_264671
PSoC™ 5, 3 & 1
Hi ThereMaybe someone can help me to optomize the attacched project.Thank you very much in advance. Show More
Anonymous
PSoC™ 5, 3 & 1
Hi,    I'm testing a SSD1963 with GraphicLCDIntf and this works, but you can see the screen building up. If i test this on an ATMega32 it's looks much... Show More
Anonymous
PSoC™ 5, 3 & 1
HelloI'm trying to debug my project and I would just like to know if there is anyway I can detect the interrupt service that creates a response on the... Show More
EyLa_1625036
PSoC™ 5, 3 & 1
Hello all  , I am trying to interface LMK03806 chip with psoc5lp , This chip works with special case of SPI called uWire the only difffrence is thatth... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello,I am currently working with four PSoC 5LP (CY8C5888LTI-LP097) and with a 4x20 LCD (NHD-0420D3Z). I am using the I2C (multi-master) and the I2C_L... Show More
KrDe_284951
PSoC™ 5, 3 & 1
HiI have an accelerometer generating interrupts on a processor pin on a regular base. I use an SPI interface to communicate between a PSoC3 and the ac... Show More
DePa_3244516
PSoC™ 5, 3 & 1
helloi am using psoc 5 lp and GLCD ssd1963 its datasheet is as per https://www.buydisplay.com/download/manual/ER-TFTM050-5_Datasheet.pdf , https://www.buydisplay.com/download/ic/SSD1963.pdf... Show More
rgpace
PSoC™ 5, 3 & 1
I want to change the UART clock source (i.e. VC2, VC3, Row_0_Broadcast, etc.) in source code.  Where can I find out how to do this in the documentatio... Show More
Anonymous
PSoC™ 5, 3 & 1
Dear All,I’m developing a PLC system based on CY8CPLC10. I bought a couple of evaluation boards to make them communicating and everything seems to be ... Show More
JaBe_1397886
PSoC™ 5, 3 & 1
I'm using an I2C Master component (tried both fixed and UDB) when I2C_1_GENERATE_START_MANUAL is executed, the SCL line goes low and stays there (i.e.... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.