PSoC™ 5, 3 & 1 Forum Discussions

PSoC™ 5, 3 & 1

Switch debouncer

I need a switch debouncer circuit built out of only PSoC ocmponents.... no firmware Can you help me Show More

By Anonymous

Aug 1, 2012

1405

PSoC™ 5, 3 & 1

difference between CY8C24423A-24PVXI vs CY8C24423A5-24PVXI

Solved

Can anyone tell me what the 5 means in this PN and the difference between: CY8C24423A-24PVXI vs CY8C24423A5-24PVXI Thanks, Katie Show More

By Katie1

Apr 24, 2023

517

PSoC™ 5, 3 & 1

Support for CY8C27243-24SXIT

Solved

Hello Infineon Team, I have few queries related to this part CY8C27243-24SXIT(M8C PSOC®1 CY8C27xxx Microcontroller IC 8-Bit 24MHz 16KB (16K x 😎 FLAS... Show More

By KK26

May 4, 2023

245

PSoC™ 5, 3 & 1

Voltage peaks during PWM generation

Solved

Hello everybody, I am currently working on an asynchronous and synchronous buck/boost converter. To control the switching behavior of the MOSFETs I am... Show More

By David_Zoeller

Apr 21, 2023

2088

PSoC™ 5, 3 & 1

Reading float data from UART

Solved

Hi, how are you? I'm having problems reading data sent from an ESP01 to my PSOC5, I am using this module to get and upload temperature data to the clo... Show More

By JulianLBTK

May 2, 2023

433

PSoC™ 5, 3 & 1

Program works in debug mode but not in release mode

Hello, I have asked you a question before (https://community.infineon.com/t5/PSoC-5-3-1/CPU-Keeps-Restarting-Itself/td-p/405011). We replaced the curr... Show More

By anil_sun

Apr 28, 2023

537

PSoC™ 5, 3 & 1

Cannot flash CY8C5868LTI-LP039 with openOCD using MiniProg4

Solved

Hello, I builded OpenOCD 2.2.0.249 available from your FOSS packages on my linux machine. I am trying to flash a CY8CKIT-005 using this tool via SWD.I... Show More

Hello,

I builded OpenOCD 2.2.0.249 available from your FOSS packages on my linux machine. I am trying to flash a CY8CKIT-005 using this tool via SWD.I have no problems flashing this MCU via PsocCreator in Windows with the MiniProg4, however I have not been able to flash the .elf or .hex binaries into the flash using Infeon-Openocd.

This is the output of openocd when I try flashing the device:

openocd -s ../scripts -f interface/kitprog3.cfg -f target/psoc5lp.cfg -c "init; reset halt; flash probe 0; flash probe 1; flash probe 2; flash banks; program /home/technitian/Desktop/fw2.elf verify reset exit;"
Open On-Chip Debugger 0.10.0+dev-gf2fe6df-dirty (2023-03-24-19:01)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter speed: 1500 kHz
cortex_m reset_config sysresetreq
Info : CMSIS-DAP: SWD Supported
Info : CMSIS-DAP: JTAG Supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 1 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : VTarget = 5.291 V
Info : clock speed 1500 kHz
Info : SWD DPIDR 0x2ba01477
Info : psoc5lp.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : Listening on port 3333 for gdb connections
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x00000010 msp: 0x20008000
flash 'psoc5lp' found at 0x00000000
flash 'psoc5lp_eeprom' found at 0x40008000
flash 'psoc5lp_nvl' found at 0x90000000
#0 : psoc5lp.flash (psoc5lp) at 0x00000000, size 0x00040000, buswidth 0, chipwidth 0
#1 : psoc5lp.eeprom (psoc5lp_eeprom) at 0x40008000, size 0x00000800, buswidth 0, chipwidth 0
#2 : psoc5lp.nvl (psoc5lp_nvl) at 0x90000000, size 0x00000004, buswidth 0, chipwidth 0
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x00000010 msp: 0x20008000
** Programming Started **
auto erase enabled
Warn : no flash bank found for address 0x80000000
wrote 16384 bytes from file /home/technitian/Desktop/fw2.elf in 2.517964s (6.354 KiB/s)
** Programming Finished **
** Verify Started **
Error: checksum mismatch - attempting binary compare
diff 0 address 0x80000000. Was 0xff instead of 0x01
diff 1 address 0x80000001. Was 0xff instead of 0x45
diff 2 address 0x80000002. Was 0xff instead of 0x00
diff 3 address 0x80000003. Was 0xff instead of 0x40
diff 4 address 0x80000004. Was 0xff instead of 0x02
diff 5 address 0x80000005. Was 0xff instead of 0x52
diff 6 address 0x80000006. Was 0xff instead of 0x00
diff 7 address 0x80000007. Was 0xff instead of 0x40
diff 8 address 0x80000008. Was 0xff instead of 0x04
diff 9 address 0x80000009. Was 0xff instead of 0x4c
diff 10 address 0x8000000a. Was 0xff instead of 0x01
diff 11 address 0x8000000b. Was 0xff instead of 0x40
diff 12 address 0x8000000c. Was 0xff instead of 0x0a
diff 13 address 0x8000000d. Was 0xff instead of 0x03
diff 14 address 0x8000000e. Was 0xff instead of 0x08
diff 15 address 0x8000000f. Was 0xff instead of 0x20
diff 16 address 0x80000010. Was 0xff instead of 0x0c
diff 17 address 0x80000011. Was 0xff instead of 0x04
diff 18 address 0x80000012. Was 0xff instead of 0x01
diff 19 address 0x80000013. Was 0xff instead of 0x80
diff 20 address 0x80000014. Was 0xff instead of 0x65
diff 21 address 0x80000015. Was 0xff instead of 0x80
diff 22 address 0x80000016. Was 0xff instead of 0xc0
diff 23 address 0x80000017. Was 0xff instead of 0x02
diff 24 address 0x80000018. Was 0xff instead of 0xd6
diff 25 address 0x80000019. Was 0xff instead of 0x01
diff 26 address 0x8000001a. Was 0xff instead of 0x00
diff 27 address 0x8000001b. Was 0xff instead of 0x00
diff 28 address 0x8000001c. Was 0xff instead of 0x04
diff 29 address 0x8000001d. Was 0xff instead of 0x00
diff 30 address 0x8000001e. Was 0xff instead of 0x00
diff 31 address 0x8000001f. Was 0xff instead of 0x2f
diff 32 address 0x80000020. Was 0xff instead of 0x2b
diff 33 address 0x80000021. Was 0xff instead of 0x00
diff 34 address 0x80000022. Was 0xff instead of 0x20
diff 35 address 0x80000023. Was 0xff instead of 0x00
diff 36 address 0x80000024. Was 0xff instead of 0x00
diff 37 address 0x80000025. Was 0xff instead of 0x00
diff 38 address 0x80000026. Was 0xff instead of 0x00
diff 39 address 0x80000027. Was 0xff instead of 0x00
diff 40 address 0x80000028. Was 0xff instead of 0x01
diff 41 address 0x80000029. Was 0xff instead of 0x00
diff 42 address 0x8000002a. Was 0xff instead of 0x14
diff 43 address 0x8000002b. Was 0xff instead of 0x01
No more differences found.
** Verify Failed **
shutdown command invoked

I have tried different commands it seems I have control over the MiniProg4, because I can power the device externally or with the programmer, I also tried kitprog3 acquire_psoc with no success:

openocd -s ../scripts -f interface/kitprog3.cfg -f target/psoc5lp.cfg -c "kitprog3 acquire_config on 1 1 1; init; kitprog3 acquire_psoc; reset init; shutdown"
Open On-Chip Debugger 0.10.0+dev-gf2fe6df-dirty (2023-03-24-19:01)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter speed: 1500 kHz
cortex_m reset_config sysresetreq
Info : CMSIS-DAP: SWD Supported
Info : CMSIS-DAP: JTAG Supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 1 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : VTarget = 5.269 V
Info : kitprog3: acquiring PSoC device...
Error: kitprog3: failed to acquire PSoC device
Info : clock speed 1500 kHz
Info : SWD DPIDR 0x2ba01477
Error: Could not find MEM-AP to control the core
Info : Listening on port 3333 for gdb connections
Info : kitprog3: acquiring PSoC device...
Error: kitprog3: failed to acquire PSoC device

openocd -s ../scripts -f interface/kitprog3.cfg -f target/psoc5lp.cfg -c "kitprog3 acquire_config on 1 0 1; init; kitprog3 acquire_psoc; reset init; shutdown"
Open On-Chip Debugger 0.10.0+dev-gf2fe6df-dirty (2023-03-24-19:01)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter speed: 1500 kHz
cortex_m reset_config sysresetreq
Info : CMSIS-DAP: SWD Supported
Info : CMSIS-DAP: JTAG Supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 1 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : VTarget = 5.260 V
Info : kitprog3: acquiring PSoC device...
Info : clock speed 1500 kHz
Info : SWD DPIDR 0x2ba01477
Error: Could not find MEM-AP to control the core
Info : Listening on port 3333 for gdb connections
Info : kitprog3: acquiring PSoC device...
Error: Could not find MEM-AP to control the core
Error: Target not examined, reset NOT asserted!

I also tried using the cmsis-dap interface:

openocd -s ../scripts -f interface/cmsis-dap.cfg -f target/psoc5lp.cfg -c "program /home/technitian/Desktop/fw2.elf; reset run"
Open On-Chip Debugger 0.10.0+dev-gf2fe6df-dirty (2023-03-24-19:01)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "swd". To override use 'transport select <transport>'.
cortex_m reset_config sysresetreq
Info : CMSIS-DAP: SWD Supported
Info : CMSIS-DAP: JTAG Supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 1 nTRST = 0 nRESET = 1
Error: CMSIS-DAP command CMD_DAP_SWJ_CLOCK failed.
Error: No Valid JTAG Interface Configured.

How can I program this MCU using openocd or the command line ?

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By taherrera

Mar 24, 2023

1792

PSoC™ 5, 3 & 1

PSoC5LP: USBFS_GetEPAckState() always returns 0

In a USB HID project (A single-touch touchscreen device), after connecting and enumerating with the USB Host PC, I am Intializing the IN EP: USBFS_Lo... Show More

In a USB HID project (A single-touch touchscreen device), after connecting and enumerating with the USB Host PC, I am Intializing the IN EP:

USBFS_LoadInEP(TOUCH_ENDPOINT, (uint8*)&TouchPacket, 12);

Then I'm sending my data to the USB host by calling the following code regularly (every pass through my main loop):

if(USBFS_bGetEPAckState(USBFS_EP1)){
    /* ACK has occurred, load the endpoint*/
    USBFS_LoadInEP(USBFS_EP1, (uint8*)&TouchPacket, 12);
}

I am connected to the host, the device enumerates and is seen by the OS (Win10), but USBFS_bGetEPAckState() is always returning 0, so my EP1 never gets loaded with the touchscreen data past the first call immediately after enumerating.

I've also tried putting the check for ACK into a while() to ensure I'm not missing anything:

while(!USBFS_bGetEPAckState(USBFS_EP1));
USBFS_LoadInEP(USBFS_EP1, (uint8*)&TouchPacket, 12);

however this just leaves me spinning infinitely waiting for the ACK.

If I remove the check for the EP1 ACK entirely and just load EP1 regardless of ACK state, I finally see data getting to the host, and the touchscreen mostly works properly (I at least get cursor movement when I touch the screen, so data is going across the interface)

Any ideas for why this could be happening? Totally clueless as to why this is a problem...

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By KyTr_1955226

Apr 24, 2023

365

PSoC™ 5, 3 & 1

PSoC5LP: Finding the source of an exception/interrupt

I'm currently trying to track down what the heck is sending me into the default interrupt handler on a PSoC5LP (CY8C5468AXI-LP104). The errno is *not... Show More

I'm currently trying to track down what the heck is sending me into the default interrupt handler on a PSoC5LP (CY8C5468AXI-LP104). The errno is *not* enomem, but another unknown exception.

The mainline code itself is doing nothing interesting when the exception occurs. The default ISR fires while the code is spinning in a CyDelay(10) call inside a very very simple self-contained 4-state state machine that performs the power sequencing for a SMARC module. I've tested the state machine itself as a bare minimum project and there is no problem, so the state machine on its own in my code shouldn't be the issue? The source of it must be coming from elsewhere (maybe a component misbehaving?).

So far I've trapped it in the Exception_EntryCallback() and am printing out some information before resetting:

void CyBoot_IntDefaultHandler_Exception_EntryCallback (void){
    uint32_t exc = (uint32_t)__get_IPSR;
    
    printf("EXC [%X][%X] \r\n", errno, exc);
    while (!(DBG_UART_ReadTxStatus() & DBG_UART_TX_STS_COMPLETE)){};
        CySoftwareReset();
}

From this, I have errno = 0x58 (88d) and IPSR = 0x85 (133d).

So this leads to the Exception source (IPSR<7:0>?) being 133, which doesn't seem to correspond to anything specific in the table provided by the Cortex M3 guide?

Given that the value from IPSR is 133, that would I think mean IRQ(117) is what's firing given (n-15 = IRQ(n-1))

This is of course assuming I'm reading everything correctly. This doesn't correspond to any interrupt I have assigned (The highest I have in my cydwr file is ISR Number 24, which is USBFS_ep_0).

I'm not sure how to proceed from here in order to keep sniffing the problem out. What other information could I be looking for to figure out what the heck is going on?

For now I'm going to one-by-one add the components from my main project into my bare minimum project and see if any one of them is the smoking gun here. Any suggestions to make the debugging process easier here would be greatly appreciated.

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By KyTr_1955226

Mar 31, 2023

1278

PSoC™ 5, 3 & 1

Build failure with UDB and USBFS with Automatic DMA

I'm running into a build failure in PSoC created 4.3 when I use a custom verilog UDB in a library with a status register and have a USBFS component wi... Show More

I'm running into a build failure in PSoC created 4.3 when I use a custom verilog UDB in a library with a status register and have a USBFS component with Automatic DMA enabled. I get the following error during build:

cydsfit.exe -.appdatapath "C:\Users\nlshi\AppData\Local\Cypress Semiconductor\PSoC Creator\4.3" -.fdsnotice -.fdswarpdepfile=warp_dependencies.txt -.fdselabdepfile=elab_dependencies.txt -.fdsbldfile=generated_files.txt -.fdsreffile=referenced_files.txt -p "C:\Users\nlshi\Documents\PSoC Creator\DmaIssue\DmaIssue.cydsn\DmaIssue.cyprj" -d CY8C5888LTI-LP097 -s "C:\Users\nlshi\Documents\PSoC Creator\DmaIssue\DmaIssue.cydsn\Generated_Source\PSoC5" -- -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE
Elaborating Design...
HDL Generation...
Synthesis...
ADD: fit.M0002: error: Symbol 'CyStatusReg_v1_90' declared twice
 * C:\Users\nlshi\Documents\PSoC Creator\DmaIssue\DmaIssue.cydsn\codegentemp\DmaIssue.v (line 18)
Dependency Generation...

If I change the configuration of the USBFS component to Manual DMA, or comment out the `include section of the verilog that imports the CyStatusReg for my UDB, the problem goes away. But if I do both, then the build fails because the CyStatusReg isn't defined.

If I want to publish my component as a library, it would seem I would need to add a configuration parameter to indicate if USBFS is used with Automatic DMA or not. Is there a better workaround? Is there a way to determine if a USBFS component has Automatic DMA enabled?

I've attached an archive of a project.

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By neilsh

Apr 24, 2023

265