PSoC™ 5, 3 & 1 Forum Discussions

Hi,,

Good Evening,

I'm working on PSoC1 CY8C22x45 MCU, and for induction applications testing the feedback

signals, like voltage, current, IGBT temperature, similarly testing for PAN sensor feedback,

by generating error condition when PAN is placed and not placed, but i'm getting error

method when PAN is placed also instead should get the error when PAN not placed,

as per the datasheet port assignment is correct, and conditions in the code is given

by comparing with the ADCCurrent for detecting the PAN conditions,

so kindly suggest me the solution to resolve this issue.

Regards,

Akash

We are using PSoC Creator 4.1 and converted our test application to bootloadable.

When we flash over JTAG either  app_1.hex or app_2.hex the bootloader checksum verification fails for both apps.

If we flash the combined app.hex, the bootloader detects that both applications have good checksums and it runs the first one.

Why do the single application packages fail?

Hello,

my effort was to create a simple USB-I2S device, 16b/48kHz, only for Tx data.

I did it on the CY8CKIT-059 Usb Dev Board.

I tried really hard, but all my attempts how to deal with DMA failed. (there are no data on the output, only the SCK and WS).

I tried a lot of different combination.

All the examples did not help me to figure out such a simple task (PioneerKit_P5LP_USB_Audio, InterIcSound, USBFS_AUDIO_PSoC3_5LP, and so on).

USBFS --> DMA --> I2S

I find the DMA wizard undersized in comparison with the whole creator IDE. There might be a more clickable process with frequently used scenarios that would generate the entire code, at least a complet working template. Now it generates almost nothing usable. If one is not skilled in the DMA, interfacing peripherals is almost impossible for him.

Could someone help me to connect USB with I2S via DMA? I have attached the entire project.

I believe it's a matter of a few lines of code for somebody skilled in the DMA.

Thank you, I appreciate all the support.

SampathS_11  Can you please help me to know what is communication distance of the Power Line Communication using CY3274 Development kit and what are the corresponding baud rates for the given distance of communication?

Regards,

Abhijeet

I would like to measure temperature on my system using a thermistor. Can I connect the Vhi and Vlow to Vdd and '0' internally on PSOC to save two GPIO?

If yes, how it will affect the measurements accuracy?

Many Thanks!

I am using several CY8CKIT-059 's in my project. On one (my Master) I use the UART on the KitProg end. On the other 8 (Slaves), I do not need the UART. I removed the KitProg from the target boards and installed  5 pin m/f headers so I can program them. That works. But I cannot use the UART. Should I be able to use it if I reconnect the KitProg with the 5 pins inthe header?

On the slaves I had used the UART for debugging but I do not need it. When I removed the KitProg, I found they would not operate correctly until I removed references to the UART from my code. Is that normal?

I noticed that when I snapped the KitProg from the board, there appeared to several PCB traces in addition to the obvious 5 pins. I cannot find an accurate schematic of the boards.  Are ther more than the five connections between the target an dprogrammer?

I'll start off with what I'm trying to do: I have a MAX11200 ADC that I'm interfacing with via a SPI Master in full duplex mode (using a CY8C3866PVI-021) and am attempting to get readings from. The ADC has a !RDY/DOUT line which is configured as high impedance when it is not selected via !CS. When the device is selected via !CS, the line drives high if no data is ready, and low if data is ready. Data is clocked out on the !RDY/DOUT line on each falling clock edge. This can be seen in the following image, from page 13 of the manual:

My issue occurs when I perform a register read from the ADC. When I select the device via !CS, the !RDY/DOUT line goes high to indicate that data is not ready to be sent from the device. However, because my SPI master sees a logic high signal on MISO while !CS is low and clock pulses are being sent out, it sees this as a valid transaction and stores the byte. This means that every time I send an address/command and read data back, I receive two bytes of data- 0xFF (or 0x00 if data is already ready), and then my actual data. See below for an example of this where my SPI RX buffer would contain 0xFF 0x02 instead of the desired 0x02:

What I'd like to do is either disable the MISO line on my SPI block when I'm not actually trying to read data, or find a way to set it to high impedance so that my SPI block doesn't see anything on the line. I could throw away the first byte of data that I read when parsing results, but I'd prefer to find a more robust way of handling the issue. The only buffer I can find with an enable signal is bufoe, which is meant to be used to drive output pins. I suppose I could pass the MISO pin to a bufoe, feed it out on another pin, then feed it back in on another pin which actually goes to my SPI block, but this seems roundabout and wasteful. If I do something like AND the MISO line with a control signal, I'm still stuck at either logic 1/0, which the SPI block will see as valid data.

Can anybody suggest a more sane/simple solution to ignoring the ADC's output line until I'm actually trying to read data from it? Thanks!