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PSoC™ 5, 3 & 1 Forum Discussions

user_2747286
PSoC™ 5, 3 & 1
Hello,in the description of soc-Input of SAR_ADC, there is following sentence in the datasheet:The first soc rising edge should be generated at least ... Show More
NiNa_4043086
PSoC™ 5, 3 & 1
Hello,I am designing a firmware using PSOC creator for PSOC5LP and I would like to use SR-FF components in my design.In my design some of SR-FF will h... Show More
rasec_2385561
PSoC™ 5, 3 & 1
I have a PSOC 5LP (cy8ckit-059) development board and I was wondering how would I go about setting the serial number for the board ? Show More
Erka_3237036
PSoC™ 5, 3 & 1
Hello all,i have facing one problem.a problem is my one gpio pin is turning off and same time my second gpio is turning on but both have some time dif... Show More
user_294846
PSoC™ 5, 3 & 1
Hi,I want to be able to modify the routing for 32 digital signals connected to 32 pins at runtime. All of them output.User should be able to select wh... Show More
euggersh
PSoC™ 5, 3 & 1
Someone else asked for help with this in another thread three years ago but didn't get any useful replies, so I'm hoping I have better luck.I have a s... Show More
RaPe_567536
PSoC™ 5, 3 & 1
I am writing directly in assembler to get speed. Using MOVC A,@A+DPTR produces opcode 93 but the prior A  value (required for the offset) appears in t... Show More
adpac_1560036
PSoC™ 5, 3 & 1
Hi im designing an application to use capsense buttons with psoc5 cy8ckit-059. i have fabricated a simple capsense board with five 12mm dia copper foo... Show More
Len_CONSULTRON
PSoC™ 5, 3 & 1
To all,This may be an obvious question.   I'm a bit new in USB CDC programming.  However my study and empirical experiments have not make it obvious.I... Show More
MiNe_85951
PSoC™ 5, 3 & 1
Hi,We use PSoC5LP to configure the capacitive button.Although PSoC4 has an API for acquiring sensor capacitance parameters("uint32 CapSense_GetExtCapC... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.