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PSoC™ 5, 3 & 1 Forum Discussions

pacr_284376
PSoC™ 5, 3 & 1
Hi Since a couple of years I use the bootloader setup as shown in attachment bl.png. Bootloading is started with a special command from the applicatio... Show More
user_3716231
PSoC™ 5, 3 & 1
Project description: 1.CY8CKIT-059 is Master and ESP8266 mini d1 is Slave. 2.Master communicate with Slave via SPI per 2 seconds and each time the val... Show More
bing2023
PSoC™ 5, 3 & 1
i have one question about CY8CMBR3106S, we have used one I2C bus to control Capsense chipset, LED driver, NFC chipset, Motor driver(total 4chipsets). ... Show More
AlVa_264671
PSoC™ 5, 3 & 1
Hi there Is been a while I not been using DMA with PsoC Creator 4.4 . I do not know what I am missing but when I am building the project that include ... Show More
HellAubert
PSoC™ 5, 3 & 1
No device detects my PSoC 5 for programming. I have only been using my PSoC for a short time and have not made any connection, sudden movement or rela... Show More
Tomfu
PSoC™ 5, 3 & 1
Hi Support Team I would like to select a USB device IC to store or read data to or from the Nand Flash or the TF Card. Could you please recommend us a... Show More
use_the_r_name
PSoC™ 5, 3 & 1
Hi, I need to make a custom delay without blocking interruptions (cuz CyDelayCycles function is blocking interruptions)I know that this delay function... Show More
maglatronix
PSoC™ 5, 3 & 1
I want to potentially hire someone to help with my project wich is a spectrum analiser made from a matrix of 480 led to display audio frequencies from... Show More
sittinhawk
PSoC™ 5, 3 & 1
Trying to get i2c master working on S6E1C3. I'm looking at the example code from "i2c_master_polling". I notice that it does not show an example of a ... Show More
neilsh
PSoC™ 5, 3 & 1
I'm having a problem using FIFOs in external access mode (where they can both be read and written by the CPU and DMA) and using 16 bit working registe... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.