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PSoC™ 5, 3 & 1 Forum Discussions

HeLa_4671121
PSoC™ 5, 3 & 1
Hello-I'm new to the PSoC world and I need some help.  I have a program that has two timing variables that I can change through the mini-USB UART port... Show More
NaAh_4673366
PSoC™ 5, 3 & 1
Hi everyone,I want to save some data using EEPROM component. But I don't know how to do it since EEPROM only except uint8 data type. But I want to sav... Show More
MaKo_4670821
PSoC™ 5, 3 & 1
Hi everyone,I Need your help. I started to work with PSoC 5LP and I want to have a terminal set up with UART.If I press T hh:mm  = sets the current ti... Show More
SaPa_4651386
PSoC™ 5, 3 & 1
I'm trying to control Wiznet W5300 (Parallel to Ethernet Chipset) using EMIF.This chip  use address line 10 bits and memory that uses Little Endian.I ... Show More
MiS_4610836
PSoC™ 5, 3 & 1
Hi, I looking for any psoc5 uC with interface qspi or similar and i cant find any one,  but I found this pdf https://www.cypress.com/file/380711 On th... Show More
JiLi_1045506
PSoC™ 5, 3 & 1
Hello, I am having problems with the classic stuck I2C slave problem.  The PSoC 5LP is the master, and if we get a glitch on the bus, the slave get st... Show More
DaSl_2925376
PSoC™ 5, 3 & 1
Don't think I'm the only one to have this problem but being new to using the Cypress Developer Community I don't know how to find the answer. So sorry... Show More
TeMa_2997106
PSoC™ 5, 3 & 1
I want to use External Reference when using ADC.However, there is no description of "SAR0 ExtRef" in the datasheet.In PSoC Creator, P0 [4] is assigned... Show More
TeMa_2997106
PSoC™ 5, 3 & 1
There is a description of OPAMP in the Pinouts section of the datasheet.However, 52LP should not have OPAMP.Is this a typo?Thanks,Tetsuo Show More
CaDu_3933941
PSoC™ 5, 3 & 1
Hi all,I am working on developing an RC car for which I need a controller and a receiver. This of course means the communication is through radio. The... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.