Using Filter component and DMA

[Anonymous]

Hi-

I am experimenting with the filter component and storing its output using DMA.  The filter datasheet says this:

DMA Request – Output *

If either channel is configured to generate a DMA request in response to a data-ready event, the DMA Request output is enabled for that channel. Each channel has a separate DMA Request output. Connect the hardware signal to a DMA component to handle the DMA routine.

The DMA Request output signal is sticky and will stay high until read. Ensure that each sample is read from the output before the next one is available. Since there is no local buffering, failure to read out a sample during this period means that the output will be over-written.

So, does this mean that, even though the DMA moves the filter data to my location of choice, I still need to perform  either a Filter_Read8(), a Filter_Read16(), or a

Filter_Read24() to reset the DMA Request Output signal? 

If this is the case (and it certainly seems to be), is there really any benefit to using the DMA transfer over simply reading the data into a memory location using the filter  ISR?

Thanks,

Rob

[odissey1]

There is no need to _Read the Filter, DMA handles this for you

/odissey1

[Anonymous]

Thanks for your comment.  I think that you are right, but I still seem to have an issue....I am sure I am doing something wrong.  Without the filter read call, I am retrieving identical data out of the filter for each DMA, so the DMA_Req_B must be firing.  If I read the filter at each isr from the DMA, the data looks good and changes appropriately(note the commented out call to the filter read in the isr).  I am missing something.  Here is the DMA and the associated ISR call for the portion of the schematic shown (just looking at channel B).  Thanks for any insight you can provide.:

int16 FilterB[FILTER_BUFFER_SIZE];

int16 * FilterB_location;

int16 FilterB_value=0;

CY_ISR( FILTERB_isr_handler )

{

    *FilterB_location = FilterB_value;

    FilterB_location++;

    FILTERcounterB ++;

    //AC_Filter_MA_Read16(AC_Filter_MA_CHANNEL_B);

    if (FILTERcounterB == (FILTER_BUFFER_SIZE))

    {

        FilterB_location = FilterB;

        FILTERcounterB=0;

     }

}

void AC_FILTERB_DMA_Config()

{

#define AC_FILTERB_DMA_BYTES_PER_BURST 2

#define AC_FILTERB_DMA_REQUEST_PER_BURST 1

#define AC_FILTERB_DMA_SRC_BASE (CYDEV_PERIPH_BASE)

#define AC_FILTERB_DMA_DST_BASE (CYDEV_SRAM_BASE)

uint8 AC_FILTERB_DMA_Chan;

uint8 AC_FILTERB_DMA_TD[1];

    /* DMA Configuration for AC_FILTERA_DMA */

    AC_FILTERB_DMA_Chan = AC_FILTERB_DMA_DmaInitialize(AC_FILTERB_DMA_BYTES_PER_BURST,           AC_FILTERB_DMA_REQUEST_PER_BURST, HI16(AC_FILTERB_DMA_SRC_BASE), HI16(AC_FILTERB_DMA_DST_BASE));

    AC_FILTERB_DMA_TD[0] = CyDmaTdAllocate();

    CyDmaTdSetConfiguration(AC_FILTERB_DMA_TD[0], 2, AC_FILTERB_DMA_TD[0], AC_FILTERB_DMA__TD_TERMOUT_EN |           CY_DMA_TD_AUTO_EXEC_NEXT);

    CyDmaTdSetAddress(AC_FILTERB_DMA_TD[0], LO16((uint32)AC_Filter_MA_HOLDB_PTR), LO16((uint32)&FilterB_value));

    CyDmaChSetInitialTd(AC_FILTERB_DMA_Chan, AC_FILTERB_DMA_TD[0]);

    CyDmaChEnable(AC_FILTERB_DMA_Chan, 1);

}