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PSoC 5, 3 & 1

NaMo_1534561
Contributor II

Hello,

Enabling external XTAL on PSoC3 adds a loop that checks the xerr bit of the register (FASTCLK_XMHZ_CSR) in the ClockSetup() function of the boot procedure.

This loop period is 130ms by default.

ClockSetup () checks bit7 (xerr) of CYREG_FASTCLK_XMHZ_CSR every 10us. but when is this register actually updated?

Some ICs exit this loop and others stay 130ms within error.

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7 Replies
BragadeeshV
Moderator
Moderator

Hi NaMo_1534561​,

PSoC 3 device has an option to enable MHzECO Oscillator Fault Recovery that checks if the oscillator is working correctly.  This option can be enabled by setting the FASTCLK_XMHZ_CSR[6] bit or using the XTAL configuration dialog (Enable fault recovery checkbox). Clock failure status is indicated by the clock error status bit (FASTCLK_XMHZ_CSR[7]) that is updated in hardware.

If you clock takes more time to startup, ie if 130 ms is insufficient, you can increase the startup time using the XTAL configuration dialog.

pastedImage_0.png

You can use the CY_CFG_Clock_Startup_ErrorCallback(); to perform error handling.

Regards,

Bragadeesh

Regards,
Bragadeesh
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NaMo_1534561
Contributor II

Hello Bragadeesh-san,

I think 130ms is enough period.

Comparing the crystal oscillation time of the good IC that boots normally and the failure IC, the difference is 2.4ms.

pastedImage_0.png

Best Regards,

Naoaki Morimoto

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BragadeeshV
Moderator
Moderator

Hi NaMo_1534561​ -san,

Thanks for the waveform. Does the failed board work with IMO?

Also, can you let us know how many boards have failed?

Please check ECO Performance Testing and Improvement section in the App note: PSoC® 3 and PSoC 5LP External Crystal Oscillators and let us know if it helps.

https://www.cypress.com/file/141216/download

Regads,

Bragadeesh

Regards,
Bragadeesh
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NaMo_1534561
Contributor II

Hello Bragadeesh-san,

Thank you for your reply.

Yes, the failure IC can works with IMO after exiting ClockSetup() code.

There are several to tens of failure parts in the field.

The customer asks the crystal maker to make adjustments, and the crystal oscillates like the figure I uploaded.

This figure shows the same crystal measured on two PCBs, therefore, I think the difference in waveform is due to IC and circuit variations.

The IC in Figure 1-1 operates immediately after exiting the ClockSetup () loop,but the IC in Figure 1-2 does not exit the ClockSetup () loop, and it takes time to execute the main.c user code.

In Figure 1-2, the crystal starts oscillating at 7.2ms.

Nevertheless, the IC remains in the 130ms loop of ClockSetup(), so I am asking on this query.

Best Regards,

Naoaki Morimoto

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BragadeeshV
Moderator
Moderator

Hi NaMo_1534561​,

Does this issue happen when you replace the chip with another chip in the failed board?

Also is it possible to perform a swap test of the chip between the failed board and good board to check if this is the issue with the board or the chip?

From your previous response, does it mean the crystal is taking more time to setup when kept in the failed board but it is working. Can you please clarify this?

The IC in Figure 1-2 does not exit the ClockSetup () loop, and it takes time to execute the main.c user code.

Does this mean the code exits the ClockSetup only after a 130 ms timeout?

Does the CyClockStartupError(CYCLOCKSTART_XTAL_ERROR) gets executed?

After exiting the ClockSetup, does the device work with IMO or the ECO? Please clarify.

Please also check the supply voltage in the failed boards. ECO crystal performance can be drastically affected by the supply voltage.

Factors affecting the Clock set up time:

1. Variation in Load Capacitance based on parasitic capacitance from board to board variations,

2. Environmental factors such as temperature and humidity

3.  Supply voltage variations.

Below is the scope shot of a working ECO Crystal. The rising and falling edges of the blue signal is the actual time taken by the ECO to stabilize.

The pin is set when  the register CYREG_FASTCLK_XMHZ_CSR is set, and cleared when the control reached end of for loop. This is the time taken by the ECO to set up. This time is typically 5 ms (depends on the Crystal you have used). Can you let us know the crystal you have used in your design?pastedImage_0.png

Regards,

Bragadeesh

Regards,
Bragadeesh
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NaMo_1534561
Contributor II

Hello Bragadeesh-san,

I write my comments below.

Does this issue happen when you replace the chip with another chip in the failed board?

--> 1

One reference XTAL is used on two boards. One is that XTAL oscillates normally and the main.c code is executed in a few ms. The other is that XTAL oscillates but remains in clocksetup () until it times out. After that, execute the code of main.c.

Also is it possible to perform a swap test of the chip between the failed board and good board to check if this is the issue with the board or the chip?

-->2

The customer exchanged XTAL and performed a swap test. The XTAL oscillation time is affected by the board, not XTAL.  (refer attached screen shot)

From your previous response, does it mean the crystal is taking more time to setup when kept in the failed board but it is working. Can you please clarify this?

-->3

Yes, it is. CyClockStartupError (CYCLOCKSTART_XTAL_ERROR) is not called in production projects.

Therefore, after exiting the 130ms ClockSetup () loop, the IC continues to operate.

The IC in Figure 1-2 does not exit the ClockSetup () loop, and it takes time to execute the main.c user code.

Does this mean the code exits the ClockSetup only after a 130 ms timeout?

-->4

Yes, it is.

Does the CyClockStartupError(CYCLOCKSTART_XTAL_ERROR) gets executed?

After exiting the ClockSetup, does the device work with IMO or the ECO? Please clarify.

-->5

CyClockStartupError(CYCLOCKSTART_XTAL_ERROR)doesn't execute. After that, the device can work with IMO.

pastedImage_32.png

Best Regards,

Naoaki Morimoto

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BragadeeshV
Moderator
Moderator

Hi NaMo_1534561​- san,

Thanks for the update.

We understand the swapping the XTAL shows there is no issue with the Crystal component. But we want them to swap the ICs to check if the IC is defective or if it is a board (layout issue). Is it possible for them to replace the PSoC chip in the failed board and test if the issue is happening?

pastedImage_0.png

When the timeout is occurring (130 ms), what is the value of xerr bit of the FASTCLK_XMHZ_CSR register?

Please share the screenshot of the clock configurator below (DWR -> Clocks -> Edit Clocks)

pastedImage_23.png

Also share the XTAL configuration window as shown below:

pastedImage_27.png

Regards,

Bragadeesh

Regards,
Bragadeesh
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