Anonymous
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Jan 31, 2014
02:23 PM
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Jan 31, 2014
02:23 PM
Dear All,
I couldn't find any timing information (number of clock cycles) for a single byte DMA transfer. How many clock cycles are needed between drq and nrq whwn one byte is transferred from ADC output register to control register?
BR,
Esa
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PSoC 5LP
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Jan 31, 2014
02:48 PM
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Jan 31, 2014
02:48 PM
If you go to architecture TRM (Technical Referenece Manual) there is a
discussion on computing cycles it takes to do a DMA transfer in the
PHUB and DMAC section.
http://www.cypress.com/?rID=72887
Regards, Dana.