Actually i am facing problem in configuring the XRT-8000(exar corportation) clock divider which has a spi interface to configure the internal registers to output a specified clock frequency... In that , the CS/ is not becoming low.. and also pls tell me what the following function does for the spi, specifically for the spi communication.. pls explain in detail...
In the same project above mentioned, with the use of internal clock, the SCLK clock is not output at the GPIOS, can i have a example project for spi master alone.... i am facing problems using the example master slave spi communication with the development kit,,,,
You can use the same example project by deleting the slave part of it.
SPI has 4 modes, depending on 2 bits (CPOL and CPHA). By looking at the Timing diagram of XRT8000, you can decide which mode to use.
Make sure that the MOSI and MISO pins are unsynchronized on the SPI master component.
SPIM_Start( ) - initializes and starts the SPI component.
SPIM_WriteTxData(value) - is a blocking statement wich writes into the Write Buffer of the SPI Master component. The data will not over-write and will wait till the previous data is sent out.
You will observe the clock on sclk pin whenever the WriteTx command is issued. For a duration of 1 byte, the ss (Slave Select) will also go low (since it is an active low logic).
Thanks for ur reply, how to read the spi slave registers, according to my SPI BASED CLOCK DIVIDER CHIP, it requires to send a 8bit value specifying read enable,and address to be read, so that when this value for read is written to spi, on the next (sclk) clock cycle spi value will output that value, i want to know in this case, what is API to be written for getting the data out from the SPI SLAVE. as u told the sclk will be available only on the SpiWriteData API execution. for ex: i have to write like this
1. 0x00 (write enable and address value)
2. 0x30 ( data to be written)
3. 0x80 (read enable and address value)
4. next sclk register data will out from spi.
i am attaching the datasheet of the spi clock divider IC, pls if possible give a sample code for the above.
Based on your previous comment, a project is created and attached along with this mail.
Try interfacing the PSoC with XRT8000 using this code.
Based on your previous comment, the following is done in the project.
1) Four SPI Master writes are done.
a) First one is for Write Enable (0x00).
b) Second is the data to be written (0x30).
c) Third is the read enable and address value (0x80).
d) Fourth is a dummy byte write. This generates SCLK (clock) and SS (Slave Select) signals and the slave (XRT8000) will send the byte requested.
2) In the SPI protocol implementation, when the Master writes a byte into Slave, the Slave will also Write a byte into the Master's Rx Buffer (it may be a junk or valid data depending upon the command sent). Hence, the first 3 write operations will result in the accumulation of 3 junk values received from the slave. So, the first 3 read operation is done to read the junk values available in the Rx buffer. The 4th value read is the desired value and is displayed on LCD.
May i know from where u got XRT8000 device.........actually i also need it for my project....do you have any idea about its availability in India ?