From the data you have provided the only possible problem in your design could be the ClockSync parameter of the PWM. Have you set this to "Use SysClk Direct"? When the ClockSync parameter is set to "Use SysClk Direct", it overrides the clock parameter and connects the 24MHz clock to the PWM. With a 24MHz clock and a period of 99, the output would be 240KHz. Change the ClockSync to "SyncToSysClk" and that should fix your problem.