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PSoC™ 5, 3 & 1

MaMi_1205306
Honored Contributor

Hi,

We are using DMA componet of PSoC5LP.

The DMA settings used are as follows:

(a) Data transfer is individually requested using the drq terminal. (Settings required for each burst)

(b) The source address after data transfer is incremented.

(c) When the transfer of all data specified by the transfer count is completed, loop back to the same TD again.

(d) Using API of TdSetConfiguration, TD_TERMIN_EN was set to enable the trq pin of the DMA component. (Enable hardware termination)

Under this setting condition, if a positive edge is input to the trq pin after the first burst transfer request,

Is the TD in the state before the first burst request?

In other words,

is the transfer count initialized?

Is the source address pointer initialized?

Regards,

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1 Solution
Len_CONSULTRON
Honored Contributor II

MaMi-san,

I believe in your case because you wrote:

(c) When the transfer of all data specified by the transfer count is completed, loop back to the same TD again.

then the answer is "Yes".

Are you seeing something different?

Len

Len
"Engineering is an Art. The Art of Compromise."

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