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PSoC 5, 3 & 1

Anonymous
Not applicable

Hello Everyone. Thanks for reading.

Please excuse any ignorance on my part. I am very new to PSoC and have yet to even program a board! I am well versed in Arduino-type micros and Raspberry Pi but have quickly reached the ceiling of the Arduino processing power and am hoping PSoC is the answer!

Quick overview of a project that I wanting to convert over to PSoC. 

RF Wireless telemetry system.

  • Current Hardware
    • 4 Wireless nodes
      • Arduino Micro connected to nRF24L01+ sending 4 bytes of data
      • Torque measurements on rotating shaft.
    • 1 Base station
      • Raspberry Pi
        • Connected to nRF24L01+ via SPI
        • Connected to Arduino Mega via USB (Serial)
          • Mega has 4 Arduino Micros attached talking on I2C. These Micros are running interrupts for pulse counters to get RPM (1500RPM, 5-10 pulses per rev (I choose this) so 125Hz-250Hz maximum)
        • Also has GPS talking over USB (Serial)
        • Pi was the best way I knew how to log to files all the data I am collecting
  • Current System Capabilities
    • ~750Hz/channel RF data read sequentially (meaning Base Station RF reads channel 1, then channel 2 then …etc). 4 bytes per channel. 16 bytes total.
    • 400Hz/channel RPM data read sequentially(meaning Arduino Mega asks each Arduino Micro one after another for their current RPM). 4 bytes per channel. 16 bytes total.
    • 10Hz GPS data. Roughly 200 bytes or so.
    • Pi logs each of the above with timestamps to separate .csv files. Each of the above are currently NOT synced together. This is the real problem!
      • The Pi has no hard system clock (oscillator or equivalent), the software clock and nature of an OS proves inaccurate for syncing these files

The Base Station is the Section that I am looking to implement PSoC. I am hoping to have PSoC be the Master on 4 SPI buses (talk to 4 separate nRF24 chips and grab 4 bytes of data), monitor 4 Interrupts (and calculate RPM), then send the 4 RF Channel data and 4 RPMs to Raspberry Pi via SPI (Pi is SPI Master and PSoC is SPI Slave).  To further complicate things I would like this stuff to happen as close to “real time” and simultaneous as possible, meaning I want RF data from each channel at 1000Hz minimum (per channel) while still being able to monitor the interrupts.

I hope I am explaining this in a clear way.

Questions:

  1. Can PSoC be a master to 4 SPI buses and get data from 4 slaves simultaneously?
  2. Can PSoC do the above while monitoring 4 separate interrupts (that WILL inevitable happen at the same time so I don’t want to miss pulses)?
  3. Can PSoC be a SPI slave and send all this data (only 32-ish bytes) to Pi?
  4. All the above be done and >1000Hz?

The Pi is still being used because the GPS is integrated to it and it has file write/storage/retrieval capability built-in but if you think PSoC could easily handle the addition of serial GPS data with 100-200 bytes @ <20Hz and data storage to SD card or something , then I am all ears!

If you have any questions or something is not making sense please ask am I will try to clear it up. Thanks again.

-Josh

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1 Solution
Bob_Marlowe
Expert II

In a PSoC 5 there is no parallel processing as far as the CPU is concerned. The interfaces do not need CPU power when a transmission is initiated or during the reception of data. All this runs in the hardware. Compared to the speed of a CPU the transmission of data is relatively slow, thus giving the interrupt handlers some time to perform.

Interrupts are not (never!) handled in parallel. Data has to be pushed on stack and the handler has to perform its job. Of course can interrupts be priorized to manage the sequencing.

My experience so far are: 1k interrupts per second used about 10% of the total CPU capability, but this always depends on the complexity of the handler.

Bob

View solution in original post

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13 Replies
Bob_Marlowe
Expert II

You could easily build more than 10 SPI (master or slave) interfaces in a PSoC5. Handling more than 1000 interrupts per second can be maintained. All interfaces in PSoC5 are internally built using configurable hardware, so there is only few CPU overhead needed for handling. There are 7 levels of interrupts, so when you keep the handlers short there will no pulse missed. Additionally you may use a 32kHz xtal for exact timing (down to 1µs or less)

Bob

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odissey1
Honored Contributor II

Josh,

All 4 nRF' can be handled by PSoC5 without Arduino micro in between.

Also, why do you need 4 nRF's? Can be a single one used to collect data from four sources?

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Anonymous
Not applicable

So yes I could use a psoc on the transmitter side but I am trying to keep redesign to a minimum. If I don't need to redesign transmitters then that would be good.

As far as receiver goes I was hoping to get a higher throughput using parallel radios. A dedicated radio pipe for each channel that essentially doesn't ever have to close.

My current design utilizes only one nrf as reciever. And then asks each channel for its most current data but does it sequentially which divides my sampling frequency by 4. No good but livable if I could have the RPM synced with rf data.

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Anonymous
Not applicable

Ok so the capability appears to be there. Can you explain what the 32khz xtal does? 32khz doesn't really seem fast enough.

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Bob_Marlowe
Expert II

The 32kHz is used as stable watch oscillator. The internal IMO has an accuracy of 1 to 3 percent depending on setting. When you need precise clocks use an external xtal. I would recommend to make a §10 investion and get a CY8CKIT-059 PSoC5 prototyping kit. Software Creator 4.1 is for free.

Bob

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Anonymous
Not applicable

Ok I ordered a few 059 boards with 32 khz oscillators and 22pf caps. I still don't understand how 32 khz gives me 1 us accuracy.  Can you explain? I would think I would need oscillators on the order of MHz not kHz. Thanks for any information and again pardon any ignorance on my part.

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odissey1
Honored Contributor II

You can use 24MHz XTAL, see thread

http://www.cypress.com/comment/407391

32kHz is mostly for time keeping on long term.

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Bob_Marlowe
Expert II

There are two terms describing different things: "Resolution" and "Precision".

The IMO (Internal Main Oscillator) allows for a resolution of less than 1µs. Its precision is without xtal in the range of a few percent. With an external xtal (24MHz) its precision will be within the ppm range, resolution is still the same.

The 32kHz watch xtal is for a precise ILO (Internal Low-speed Oscillator) which usually drives an RTC and has a precision of (bad, bad) 60%. ILO is also used during some of the power saving modes where the IMO is switched off.

Bob

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Anonymous
Not applicable

Okay! Thanks for the replies!

Sounds like a 24 megahertz clock May be the way I need to go. My device will not be powered on and clocking data for more than 12 hours at a time so I don't really need a long-term steady clock.

So what about the parallel processing power of PSoC? When I instantiate four different spi masters and also have four interrupts and one spi slave can all this data be clocked in / clocked out at the same time? Or do things happen based on priority? Is there a limit to how many things can happen at once?

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Bob_Marlowe
Expert II

In a PSoC 5 there is no parallel processing as far as the CPU is concerned. The interfaces do not need CPU power when a transmission is initiated or during the reception of data. All this runs in the hardware. Compared to the speed of a CPU the transmission of data is relatively slow, thus giving the interrupt handlers some time to perform.

Interrupts are not (never!) handled in parallel. Data has to be pushed on stack and the handler has to perform its job. Of course can interrupts be priorized to manage the sequencing.

My experience so far are: 1k interrupts per second used about 10% of the total CPU capability, but this always depends on the complexity of the handler.

Bob

View solution in original post

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Anonymous
Not applicable

Again I am learning psoc and still getting acclimated so I appreciate your explanations.  So in the description of psoc 5 it says "unmatched parallel processing"? How is this? Is this talking about interfacing with the DMA's?

Also regarding C code and spi transfers, when I call a spi transfer does c code return immediately and continue to next line or does it wait for transfer to happen between slave and master and then return?

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Bob_Marlowe
Expert II

"unmatched parallel processing"

The PSoC5 has got 24 eight bit wide UDBs (Universal Digital Blocks). Each of those contains an ALU some registers and a bunch of programmable glue logic and two 4-byte deep FIFOs. All this can be programmed using HDL (Warp Verilog). Most of the availlable components for the PSoC5 have been made this way.

So you may look at a PSoC 5 as an ARM M3 plus 24 small ALUs which will indeed run in parallel.

"​C code and spi transfers"

Most communication interfaces in PSoCs offer different ways to handle: Blocking and non-blocking.

The blocking APIs will wait until the data is put into the transmitter and exits.

Non blocking APIs will store the data in a buffer and handle the next transfer interrupt driven.

All interfaces make use of a FIFO buffer from which the data is put into the transmitter without CPU action.

I would suggest you to

Download and install the Kit setup file (594MB).

Start one of the example projects.

You now have access to all the datasheets for each component which will answer some of your questions. Just right click on a component and choose "datasheet" or, if you want, select "Find code example".

Bob

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Anonymous
Not applicable

Thanks Bob. I am working through some examples now. Psoc is a different beast and there is alot to learn.

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