PSoC 5 CY8CKIT-059: From 5V to 3.3V

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JaRa_1183061
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Hi, 

Is it possible to run CY8Ckit-059 with 3.3V at the pins? Right now the voltage is 4.8V. 

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WaMa_286156
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If you are simply connecting to 3.3v devices on the 059 kit I/O pins, you can configure the connected outputs on the PSOC to be open collector, pulled up with resistors connected to your 3.3v supply.  Configure the inputs to be high impedance, and the 3.3v devices will drive the input levels high enough to be recognized by the PSOC 5 running at 5v.  Using resistors may limit the digital speeds involved, but I've use 115,200 baud rates with no problems communicating device to device a 3.3v into a 5v input.

 

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Len_CONSULTRON
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JaRa,

The simple answer is: Yes.

The CY8Ckit-059 is a great low-cost kit to start with.

If you plug in the KitProg side of the kit into the USB you will get 4.8V as you measured.

This is because the USB, by definition, is suppose to supply 5V with up to 0.5A of current.

The Target PSoC5 board on the other side of the KitPRog board is supplied with this 5V (minus 0.2V drop from a Schottky diode = 4.8V).   You can elect to remove a resistor on the Target board to disconnect this supply from the KitPRog if you want.  This will require you to supply the 3.3V on one of the Target VDD pins.

Len
"Engineering is an Art. The Art of Compromise."
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BiBi_1928986
Level 7
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Hello JaRa.

As Len mentioned, KIT-059 is a great kit for experimenting.

To use the target 5LP at 3.3V, you'll want to follow the Cypress documentation for KIT-059, Section 4.2.3.  Simply remove diode D1 on Kitprog pcb.

Here's why:
1) Kitprog measures Vtarg and adjusts the voltage on its SWD interface to match Vtarg on target 5LP.
2) Kitprog uses Vtarg for the i2C pull-up resistors when you want to use the Kitprog i2C bridge.

Unfortunately, Cypress does not mention what to do with Kitprog UART bridge for Vtarg voltage compatibility.  If you do nothing, you will eventually burn out the target 5LP input protection diode on the RX GPIO and possibly kill the GPIO altogether.  Fortunately, KIT-059 has installed a pair of resistors, R22 and R23 (located on target 5LP pcb), that can be changed to something like 4.7k-10k Ohms.  This will limit the current through the protection diodes.  Not a perfect solution, but workable.  Not many people will have surface mount resistors lying around.  That's okay because you can simply remove R22 and R23 and use descrete resistors connected to the appropriate GPIO pins of Kitprog and target 5LP pcb's.  Look at the schematic for all the GPIO references.

Now, how about that micro-USB connector?  Well, if you plan to use it, you need to remove diode D2 from target 5LP pcb.  Otherwise, the micro-USB Host port will apply 5V to target 5LP.  That would not be good.

Some people have had success not doing anything except applying 3.3V to target 5LP.  Others wondered why their 5LP died.  So, it's not a guaranteed success to do nothing.

Good lock with your project.

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BiBi,


... If you do nothing, you will eventually burn out the target 5LP input protection diode on the RX GPIO and possibly kill the GPIO altogether.  

Fortunately, KIT-059 has installed a pair of resistors, R22 and R23 (located on target 5LP pcb), that can be changed to something like 4.7k-10k Ohms.  This will limit the current through the protection diodes.

The UART and I2C connections from the KitProg and Target board are on SIO pins.   This was on purpose because the SIO pins are fault-tolerant to voltages above the Target VDD and up to 5V.

Here's an excerpt from page 10 of  AN60580 – SIO Tips and Tricks in PSoC 3/PSoC 5LP 

6 Tip 4: Level Shifter
The SIO pins are tolerant to input voltages higher than the I/O supply voltage. The hot swap feature prevents input from being clamped to the I/O supply level, when the input voltage is above the I/O supply voltage. Each SIO pin can tolerate any input voltage up to 5 V, regardless of I/O supply voltage. In cases where the input voltage exceeds I/O supply voltage, the DC input leakage current is < 100 µA. This feature allows the SIO to be connected to an external bus that can be switched to voltage levels higher than the I/O supply voltage.

Therefore, changing R22 and R223 should be unnecessary.  


...

Now, how about that micro-USB connector?  Well, if you plan to use it, you need to remove diode D2 from target 5LP pcb.  Otherwise, the micro-USB Host port will apply 5V to target 5LP.  That would not be good.


You are correct that 5V from the micro-USB connector could be damaging probably to the circuit supplying the 3.3V.

Len
"Engineering is an Art. The Art of Compromise."
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Hi Len.

I agree with what you say wrt SIO voltage.  It's the next sentence that I may be mis-interpreting for input current flow.  The SIO input protection diode has a current rating of 100uA (from datasheet).  I assumed this meant we must limit the input current to lessthan 100uA.  Maybe I'm wrong?

The example of an open drain output on page 10 shows a pull-up resistor.  This resistor also limits current flow into PSoC operating at 3.3V.  Too bad Cypress didn't specify the resistor value.  AFAIK, the input protection diode is always present, even when SIO is configured as output direction.

Thoughts?

edit: Okay, I found my confusion or at least updated my current understanding.
The SIO protection diode only goes to the negative rail (Vss).  There is no positive rail protection diode that I could find (datasheet, TRM, AN60580).  And that makes sense, otherwise, there would be a current flow when PSoC SIO is Hot Swap inserted with PSoC powered OFF.

Here's what confused me from datasheet:
6.4.14 Hot Swap
...
This allows the unpowered PSoC to maintain a high impedance load to the external device while also preventing the PSoC from being powered through a SIO pin’s protection diode.

Well, that statement made me think there was a positive rail protection diode when in fact, there isn't one.

I also found in TRM, 
19.3.14 Overvoltage Tolerance
All I/O pins provide an overvoltage (Vddio < Vin < Vdda) tolerance feature at any operating voltage. Limitations include the following:
■ No current limitations for the SIO pins, because they present a high impedance load to the external circuit.
■ GPIO pins must be limited to 100 μA, using a current limiting resistor. Outside the current limitation, GPIO pins clamp the pin voltage to approximately one diode above the Vddio supply.

And those statements, I agree with.

So, I'd have to conclude, the SIO protection diode current shown in datasheet is referring to the negative rail clamp diode, 100uA.

Back to JaRa's original post...,
Simply remove diode D1 from Kitprog pcb if you want to run all of target 5LP (processor and I/O's) at 3.3V (and connect 3.3V from your external power source to target pcb).
If you intend to use micro-USB port with target 5LP at 3.3V, remove diode D2 from target 5LP pcb.

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Bibi,

Yes.  The reference to < 100uA is confusing.   Usually keeping the current below 100uA on a GPIO input is to prevent a 'latchup' silicon fusing condition on the ESD diode.  

I have not found a good schematic on the SIO internals.   Therefore we can only guess as to how they are able to prevent latchup up to 5.5V.

As you pointed out, there is no undervoltage protection so that Vin <-0.5V with current > 100uA can fuse the ESD protection diode to Vss.

Len
"Engineering is an Art. The Art of Compromise."
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WaMa_286156
Level 5
Level 5
First comment on blog 100 replies posted 50 replies posted

If you are simply connecting to 3.3v devices on the 059 kit I/O pins, you can configure the connected outputs on the PSOC to be open collector, pulled up with resistors connected to your 3.3v supply.  Configure the inputs to be high impedance, and the 3.3v devices will drive the input levels high enough to be recognized by the PSOC 5 running at 5v.  Using resistors may limit the digital speeds involved, but I've use 115,200 baud rates with no problems communicating device to device a 3.3v into a 5v input.

 

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