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PSoC3 CY8C34 Famiry
DC Specifications
VDDD (Digital core regulator enabled) : Min 1.8V Max 5.5V
Precise Low-Voltage Reset (PRES) with Brown Out DC Specifications
PRESR (Rising trip voltage) : Min 1.64V Max 1.68V
PRESF (Falling trip voltage) : Min 1.62V Max 1.66V
PSoC4 PSoC4000S Famiry
DC Specifications
VDD (Internally regulated supply) : Min 1.8V Max 5.5V
Power On Reset (PRES)
VRISEIPOR (Rising trip voltage) : Min 0.80 Max 1.5V
VFALLIPOR (Falling trip voltage) : Min 0.70V Max 1.4V
Q1. when the voltage drops, PRES is asserted in PRESF(VRISEIPOR) voltage range.
When the voltage recovers, PRES is negated in PRESR(VFALLIPOR) voltage range.
Are these correct?
Q2. When the voltage drops, even if it is below 1.8V, the device is in the normal operating state until PRES is asserted.
When the voltage recovers, even if it is still below 1.8V, the device is in the normal operating state after PRES is negated.
Are these correct?
Solved! Go to Solution.
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PSoC 3
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Yes, your interpretation is correct. When we say PRESF (Falling trip voltage) : Min 1.62V Max 1.66V - if VCCD or VCCA drops to anywhere between 1.62V and 1.66V, a PRES reset shall be asserted. Until PRES is asserted - the device shall be in normal operating range, but we do not guarantee full performance if voltage is between 1.66 V and 1.8 V.
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Yes, your interpretation is correct. When we say PRESF (Falling trip voltage) : Min 1.62V Max 1.66V - if VCCD or VCCA drops to anywhere between 1.62V and 1.66V, a PRES reset shall be asserted. Until PRES is asserted - the device shall be in normal operating range, but we do not guarantee full performance if voltage is between 1.66 V and 1.8 V.
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Thank you for your answer.
Please tell me a little more.
What kind of performance degradation can it have?