Interface LMK03806 with psoc5lp - 32 bit SPI

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EyLa_1625036
Level 3
Level 3
10 likes given 10 sign-ins 25 replies posted

Hello all  ,

I am trying to interface LMK03806 chip with psoc5lp ,

This chip works with special case of SPI called uWire the only difffrence is that

the ss line goes high at the end of the transmission according to the attached diagram ,

further more this chip works with 32bit data length (max psoc spi is 16bit length) ,

i have created and attached my project ,

when i measure with scope the sclk pin going out from the spi psoc component i see something

very wierd ,

at the start of the TX  sclk pin start to toggle (6 mhz clk) and Never stops.

i can even write Spi_compenent_stop()  and it stills toggles ,

any one has any idea how to solve this issue ??

uWire_LMK.PNG

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1 Solution
Anonymous
Not applicable

Hi,

I tested the attached project and I don't see the clock continuously coming on the pin (I tested on a different PSoC 5LP device). However, i do see one issue in the code. In the function microWireWrite(), you need to check the TX status register. But, in the code, a constant is being used as condition check for the while loop. This causes SS signal to be misaligned. Please use the following statement instead of the present while loop.

while((microWire_spi_ReadTxStatus() & microWire_spi_STS_SPI_DONE) == 0);

-Rajiv

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3 Replies
Anonymous
Not applicable

Hi,

I tested the attached project and I don't see the clock continuously coming on the pin (I tested on a different PSoC 5LP device). However, i do see one issue in the code. In the function microWireWrite(), you need to check the TX status register. But, in the code, a constant is being used as condition check for the while loop. This causes SS signal to be misaligned. Please use the following statement instead of the present while loop.

while((microWire_spi_ReadTxStatus() & microWire_spi_STS_SPI_DONE) == 0);

-Rajiv

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Thank you Rajiv !

I think my initial input clock (5mhz) Caused this issue .

i will implement your fix and replay with an answer  tomorrow (I don’t have a scope right now).

do you think my implementation project will achieve the attached timing diagram ?

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Anonymous
Not applicable

You're welcome.

I just noticed - CyDelayUs(tCES) should appear after the 32-bit transmission is completed. Rest looks fine.

-Rajiv

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