How to manually enable Vref?

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YaCh_3198276
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I am using 5LP and need 1.024V Vref in the schematic.

Because all 4 Comparators are used, I am not allowed to "AutoEnable" the 1.024V Vref, the Datasheet says Vref needs to be manually enabled in analog block.

But I cannot find the instructions for how to manually enable Vref.

Can someone help me on this?

Thanks.

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YaCh,

I'm back.

I performed some experiments and have some suggestions.

Attached is a project based on your original design intent.  It has three schematic sheets.  Enable only one sheet at a time.  Disable the enabled sheet first, then enable the next sheet.  Perform a build.

The application in main() switches the AMux_1 one channel every 1 second and displays the mV reading using the DEBUG_UART @ 115.2Kps.

The "sch" is a modification of your original design (See pic below).  I included 3000mV and 500mV VDAC sources to drive the channels 0 and 1 of AMux_1.

The 1.024V Vref is not AutoEnabled.  The resultant channel 3 voltage reading is 1824mV.  There is also a Opamp follower mode on the output of the AMux_1 to see the result of the mux on a scope.

pastedImage_1.png

The "VDAC" sheet (See pic below) replaces the 1.024V Vref with a VDAC generating 1.020V.  The resultant channel 3 reading is about 1042mV.  This is more on target.

pastedImage_3.png

The final "VFD" sheet (See pic below) keeps the 1.024V Vref on channel 3 with it AutoEnable'd.  It does replace Comp_1, Comp_2,  Comp_3 and Comp_4 with a 4-channel VFD component.  The resultant channel 3 voltage is about 1042mV.  I did not fully configure the VFD so it may not be working to intended spec.

By the way, Cypress provides a PowerMonitor that provides ADC readings and input voltage fault detection of various types.

pastedImage_4.png

Maybe one of these ideas will work for you.

Len

Len
"Engineering is an Art. The Art of Compromise."

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Vasanth
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Hi Yanjie,

Could you please give more details to recreate the issue at our end ? Could you please share your project or schematic ?

Best Regards,
Vasanth

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Vasanth,

Here are screen shots of my project, .cydwr and .cysch are also attached.

device=CY8C5888AXI-LP096(80MHz), Vdda=Vddd=5.0V

Creator 4.1 update 1 version.

I looked into “Analog Block”, but have no idea how to manually enable Vref 1.024V.

Thanks.

Yanjie

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YaCh,

As posted eariler, the problem is that the Vref resource is tied to certain analog blocks,  In this case, the error is that you are using 4 Comparators and the Vrefs you want need to dedicate one of the comparators.

I tried taking the Vdda/2 vref and using it as a '+' input of an Opamp in follower mode.  Same issue: Exceeded maximum number of comparators.

There are some other potential solutions.

  • Do you need to have 4 dedicated comparators for AIN1 through AIN4?  It is possible to use a comparator to monitor more than one input if you place a AMux in front of the '+' input.  This does mean that the comparator has to be coordinated in SW to switch the Amux and then after a settling time, read the comparator output.
  • Can you use the 1.024V Vref for the '-' pins of the comparators?   The routing of the 1.024V is more available.  If AIN1 through AIN4 can be scaled to match a 1.024V Vref, the project will build.

Len

Len
"Engineering is an Art. The Art of Compromise."
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I need to use all 4 comparators for real time signal processing, so AMUX does not help here.

Tried to share one REF_1024V for all 4 comparators, but it doesn’t work, looks like each comparator has dedicated REF voltage source.

There are some mux/nodes in Analog Block which have corresponding registers, such as 0x40005870, 0x40005AC3. I think these registers can be used to manually routing analog signals including REF_1024V, but I cannot figure out how to use them and cannot find instructions in TRM.

So basically my question is: with all 4 comparators already used, how to manually enable REF_2014 and route it to ADC input via AMUX.

Thanks.

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Yanjie,

Try to disable "Auto enable" option for 1.024V reference (AMux). I believe that it will be enabled and connected internally anyway, as all Comparators are enabled.

/odissey1

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That is where my issue comes from.

The “auto enable” is in REF_1.024V, not in AMUX.

Yes, after disable “auto enable” in the REF_1.024V(Advanced tab) I can build the project without error, but the REF voltage is not enabled and has no output, so that is why I am asking “how to manually enable VREF”.

Thanks.

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YaCh,

I see the posts provided so far have not answered your question directly.

Let me give it another try.

Reconstruct your Topdesign to have the configuration below for the analog section.  Deselect "AutoEnable" for the 1.024V Vref.

pastedImage_0.png

Len
"Engineering is an Art. The Art of Compromise."
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Yes, I did it and no compilation error, but 1.024 ref is not enabled and is not connected to ADC input.

My question is how to “manually” enable Vref, not how to pass compilation.

Thanks.

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YaCh,

Working on it.  I thought I had an answer and tried to cancel the prior post when I didn't resolve the problem.  Oops!

I'm working on a solution that might require going to the DWR Analog tab to identify the analog switch registers and the mask values to use to enable the Vref in your code.

Len

Len
"Engineering is an Art. The Art of Compromise."
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YaCh,

I'm back.

I performed some experiments and have some suggestions.

Attached is a project based on your original design intent.  It has three schematic sheets.  Enable only one sheet at a time.  Disable the enabled sheet first, then enable the next sheet.  Perform a build.

The application in main() switches the AMux_1 one channel every 1 second and displays the mV reading using the DEBUG_UART @ 115.2Kps.

The "sch" is a modification of your original design (See pic below).  I included 3000mV and 500mV VDAC sources to drive the channels 0 and 1 of AMux_1.

The 1.024V Vref is not AutoEnabled.  The resultant channel 3 voltage reading is 1824mV.  There is also a Opamp follower mode on the output of the AMux_1 to see the result of the mux on a scope.

pastedImage_1.png

The "VDAC" sheet (See pic below) replaces the 1.024V Vref with a VDAC generating 1.020V.  The resultant channel 3 reading is about 1042mV.  This is more on target.

pastedImage_3.png

The final "VFD" sheet (See pic below) keeps the 1.024V Vref on channel 3 with it AutoEnable'd.  It does replace Comp_1, Comp_2,  Comp_3 and Comp_4 with a 4-channel VFD component.  The resultant channel 3 voltage is about 1042mV.  I did not fully configure the VFD so it may not be working to intended spec.

By the way, Cypress provides a PowerMonitor that provides ADC readings and input voltage fault detection of various types.

pastedImage_4.png

Maybe one of these ideas will work for you.

Len

Len
"Engineering is an Art. The Art of Compromise."
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Len,

Thanks for the suggestions and different schematics, although those are not what I am looking for.

In my application I need 1.024V ref as input to ADC and have to deselect “Auto Enable” because all 4 comparators are used.

The Vref configuration says “need to be enabled manually”, so there must be a way to enabled Vref manually but I don’t know how and cannot find it in DS or TRM.

My only question is: how to manually enable Vref either in schematic or in software?

Thanks.

Yanjie

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Yanjie,

I understood what you were asking.

My "sch" schematic is an attempt to do just that.  However, something was not quite right.  The best I got was 1.824V instead of 1.024V from that vref.

My "VDAC" replaced the 1,024V with a VDAC output of 1.020V.  The result was very close at 1.042V.  You can probably blame the ADC linearity for the discrepancy.  There are ways to apply a gain and offset correction factor on the ADC results.

My "VFD" kept the 1.024V vref but replaced your comparators with a VFD component that mux scans the inputs and provides an output for each fault decision.  You'll notice in this case the 1.024V vref still reads 1.042V which I credit the ADC linearity.

Len

Len
"Engineering is an Art. The Art of Compromise."
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Len,

“sch”: Because 1.024V REF is NOT auto enabled so the reading is incorrect (1.824V). If we can manually enable it in schematic or software then we should be able to read it correctly.

You just tried to disable “Auto Enable”, not “manual enable” which is what I am asking.

“VDAC”: you used VDAC to produce 1.024V, that is not what I need. I need 1.024V from VREF not from other sources.

“VFD”: VFD cannot replace comparators in my design, because I need comparators for real time signal processing (not for voltage monitoring)

So my question is just “how to manually enable VREF?”, don’t worry about other parts of my design.

Thanks.

Yanjie

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Yanjie,

I've looked at the Analog DWR tab to examine the Mux switch routing. I've also analyzed the code generated for the Amux switching.  In both cases, It appears the proper analog routing switches are being turned on yet I get 1.824V.  I'm stumped.  Cypress will have to provide their wisdom unless another user has conquered this problem.

The schematics "VDAC" and "VFD" were an attempt to find another solution.

Len

Len
"Engineering is an Art. The Art of Compromise."
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The AMUX is ok, the problem is that VREF 1.024V I is not turned on.

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Vasanth
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Hello Yanjie,

Apologies for joing back vey late into this conversation.  When AutoEnable is set to true (Default), Vref is enabled automatically when the device is initialized and the static analog routes are established. This parameter applies to the 1.024 V and 0.256 V options for connections that are not dedicated to analog peripherals. When a 1.024 V or 0.256 V Vref is connected to intended analog block connections such as the comparator, the device automatically enables the Vref when the connected components are enabled. AutoEnable is not necessary in these cases. If the intended use of the Vref component is to connect to a non-dedicated block, then it is necessary for the dedicated block for that voltage reference to be consumed and powered in order to power the voltage reference. But as in your case as all the comparators are exhausted, the issue occurs. Len's alternate schematics seems to be the best solution for functionality.

Best Regards,
Vasanth

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