DelSig ADC gain error

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Anonymous
Not applicable

Testing the DelSig ADC on PSoC First Touch kit, with 0-6*Vref range I get a >5% gain error. With other ranges the error is smaller but still out of spec. Is there any misconfiguration that could cause this or are there silicon errors on ES1?

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2 Replies
Anonymous
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Torpe,

   

 

   

Can you please throw more light on your setup. Are you enabling Internal Buffer in the Delta Sigma ADC?

   

It will be helpful to analyze if you can  attach the project.

   

 

   

Regards,

   

dasg

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Anonymous
Not applicable

Hi Dasg,

   

 

   

I've tried both with buffer bypassed and rail-to-rail. And with and without external bypass (that I added on FirstTouch board) of Vref. Please find attached this part of my project.

   

 

   

Regards,

   

torpe

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