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Hi All,
I want to use a Counter component as 32Bit Timer in PSoC 4 BLE and I am connecting a clock source to counter clock and I am getting following warning:
Warning-1366: Setup time violation found in a path from clock ( CyHFCLK ) to clock ( Clock_1 ).
I am getting this problem when the IMO is higher than 24 MHz. There is no warning for 24 MHz IMO.
So, what is the problem
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The max frequency for the 32-bit UDB up-counter is defined as 26MHz, look at the AC-specifications in the datasheet. You may use a clock with a lower frequency derived from IMO.
Bob
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I am already using new clock resources with lower frequencies which derived from HFCLK. I have also tried KHz but If the IMO is higher than 24 MHz, I am getting warning.
My circuit is very simple, see below;
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How is Pin_1 synchronized?
Best is usually to post your complete project, so we all can have a look at all of your settings. To do so, use
Creator->File->Create Workspace Bundle (minimal)
and attach the resulting file.
Bob
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Found it: Set Pin_1 Synchronization to "Transparent".
Bob
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Thanks Bob,
Originally, I was using a Control Register to reset Counter. When I was change bit mode from 'Direct' to 'Sync (or Pulse)', problem is solved.
Regards.
Murat.