PSoC™ 4 Forum Discussions
Can chip signals be changed in a project?
I want to change another chip signal, but I don't want to change the program under the current project unless it is necessary.
Show LessI have added code.
I modified the configuration。
I recompiled the code and the added code was lost. How to set , the code I added is not lost?
Show LessHello Team Infineon,
I have questions on PSoC 4100 BLE I have two questions:
1. What is the maximum number of Segment LCD can one PSoC4100 BLE can handle?
2. What is the maximum number of pins in PSoC4100 BLE can be used for Segment/Character LCD?
the datasheet shares 4 COMs and 32 pins, but can there be more pins used to control Segment/Character LCD?
Regarding "1.", after reading the datasheet, I checked Functional block. There is a LCD block.
There is one LCD Block, but I cannot find the maximum number of Segment LCD
can one PSoC4100 BLE can handle.
Regarding "2.", in PSoC 4100 BLE Datasheet> Features > Up to 36 Programmable GPIOs,
the explanation says "Any GPIO pin can be ... LCD, ..."
according to PSoC4100 BLE Datasheet > Special-Function Peripherals>LCD Segment Drive section,
It says LCD controller can drive up to "four commons" and up to 32 Segments.
What is the maximum number of pins in PSoC4100 BLE can be used for Segment LCD?
Thank you for your concern and help.
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Dear Receiver,
When I create an example bootloader and bootloadable project in "PSOC 4 Creator 4.4", I will get 2 projects at the same time.
They are 1). bootloader project and 2).bootloadable project.
I guess bootloader and bootloadable projects are a kind of pair projects. These 2 projects can't be separated.
Assume in some days...
I only got a 2). bootloadable project from other people, but I don't have his 1). bootloader project.
Could I make a new 1). bootloader project by myself to program his bootloadable project ?!
Thank you so much.
Show LessHi community,
In our designing team, we are using the touch controller CYAT81658-64AS48 in our design and are missing some information in order to proceed in our developments and tests. Would it be possible to share with us the "Programmers Reference Guide" and/or the "Full datasheet with I2C register and programming information"?
Thank you in advance for the support,
Best regards, Dario Maione
Show LessPSoC4000 has two GPIO register to set the Port-Configuration (Drive-Mode): GPIO_PRTx_PC and GPIO_PRTx_PC2.
GPIO_PRTx_PC specifies the Drive-Mode of a Pin, and GPIO_PRTx_PC2 is used to explictitly disable the input Buffer for a Pin.
In PSoC4000S TRM it is descibed, that using Drive-Mode 'Analog' in register GPIO_PRTx_PC automatically disables the input buffer.
When I checked the API Code for initializing CapSense Pins, I noticed that Drive-Mode was set to 'Analog' in PC-Register and additionally the input-buffer was disabled in Register PC2-Register.
My Question: Is there a difference in analog characteristics depending on PC2 setting for Drive-Mode-Analog?
Thank you.
Show LessHi,
I am using a PSoC 4200 device connected to an RTC (DS3231) and an OLED display (SSD1306). The PSoC is supposed to read time from the RTC and then update the display. After updating the display, PSoC goes to Hibernate power mode and wakes up when the RTC gives an interrupt.
The issue is that the code works fine when the PSoC is powered on (booted) but once it goes to hibernate mode and comes back to active mode after the interrupt it tries to access I2C addr of 0x00 which is wrong and hence the whole code fails. to update the display, and this keeps repeating after every time PSoC wakes up from hibernate. There are two I2Cs in design one for RTC and another one for display, this issue is only seen with the I2C connected to the display,.
This issue is not seen only when the device comes back to active from hibernate, this issue is not seen in the wakeup from DeepSleep of sleep mode.
Thanks,
Rahul
Show LessHello, i accidently dissabled the SWD-Pins on PSoC4000S (Cy8C4024LQI-S412) Device by clearing HSIOM-Register HSIOM_PORT_SEL3 to 0x0000'0000. This Register normally connects Pins P3.2 and P3.3 to internal signals cpuss.swd_data/cpuss.swd_clk (HSIOM_PORT_SEL3 = 0x0000'ee00). Furthermore the DriveMode was also
cleared in GPIO-Port3 (GPIO_PRT3_PC = 0x0000'0000).
Now i can't access the device to reprogram it. I will not belief that the device ist lost (demaged) now.
Is there any posibility to regain access to the device ?
Thank you
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