PSoC™ 4 Forum Discussions
Can someone explain how to use CyBle_GattsReadAttributeValue()?
Or I have to use something else if I want GATT sever device to read a characteristic value from its GATT database?
Show LessHello all,
I am hoping to get create a custom client that will be able to handle data that it receives from a server/peripheral device. The server is sending data via notifications. I have already written the server side and was really pleased with all the good example projects that were helpful in development. Now that I am writing the client code, I am finding it slightly more difficult.
At this point, I have opened up the PSoC_4_Central_IAS example project in order to get a starting point for develping the client program that I need. The first thing that I did was call a few API's that I added to bleApplications.c in order to discover attribute. I called CyBle_GattcDiscoverAllPrimaryServices(), CyBle_GattcDiscoverAllCharacteristics(), and CyBle_GattcDiscoverAllCharacteristicDescriptors(). These all have returned with no error. Now that I have done that, I assume that my next step is to enable notifications to come from the server, and then log the data that the server gives me.
The main questions I have here are, what API do I call to do this? I was thinking about using GattcWriteCharacteristicDescriptors() and writing a 0x01 to UUUID 2902 which is the CCCD handle. Does this seem to make sense?
Then I am wondering what else I need to do on the client side to start getting the data that the server sends assuming I have successfully enabled notifications. Do I need to add all the services, characteristics, and descriptors that the server has to be identicle in the client Macro BLE block? At this point, I just mirrored the attributes of the server including all the same UUUID's. Is this necessary?
The final thing I am wondering, which sort of relates to the other questions I have asked, is where all the data that the server sends can be found. Is there a function that I should call that returns the value of the data being sent? Or is there some variable or struct that exists which holds the notification data?
I realize there are a lot of questions posed above and I am hoping that someone may have some insight or recommendations of places to go to get some more information, or perhaps an example project that would have some helpful examples.
Thanks for the input, I can clarify any questions you have in response to the above.
Show LessI would like to do the FCC testing of the Custom Hardware. Cypress Technical support team has provided me a sample project.
As per the project, We need to put BLE into Host Controller Mode. Can we write some code and put ble into Host controller mode?
I am thinking of creating a custom BLE profile which will accept Mode of operation, Channel, and Power level using BLE.
Board operation will be-
1) Turn on the Unit
2) Pair
3) Enter
a) Power Level
b) Channel
c) Mode of Operation
4) Turn off Phone/computer used to communicate to the device
5) Run the test
6) After one test is done, power cycle the device, and GOTO 2 (had to put a goto statement in there)
After power on , device will be in advertising mode. Pair with mobile or CySmart tool and accept user options. Then switch to Host controller mode and run the test. Is it possible to implement?
Or suggest some good option.
Note - I don't have UART block/pins available.
Nilesh.
Show LessI have a PSoC4 BLE project that needs to do OTA updates to an external SPI based flash memory. It is using the CY84248FNI-BL483 device, which means it has a 256B page size for the internal flash. My external SPI based flash also has a 256B page size.
Updating the flash via the CySmart iOS app (which I downloaded the source code for and compiled locally installing an image to update), I choose the "stack and app" option for updating (for future reference, it fails if I choose app only, too). I can see via a UART that the flash all makes it to the external memory successfully (every page passes its checksum). I can also see that when the bootloader reboots, it checks the external flash and sees that the checksum of the entire image is valid.
I then get the UART output that says it is copying the external flash image to internal flash. When it is done, however, it checks the checksum of the copied app, and it fails. So it says the internal flash is invalid and the external flash is "loaded", so it schedules a reboot to copy it again, and this continues for eternity. The external image is always valid checksum, but the internal flash is saying the app is invalid.
For debug, I went even deeper into Bootloader.c of the bootloader (i.e. the generated code), and had it spit out the bytes it was using to calculate its checksum. I figured maybe a row was missing or something silly. But as I did this byte-by-byte dump, things look off. Right within the first page, there are bytes that are incorrect. Eventually, whole pages will have issues (like, things will by shifted by several bytes from the same row in external flash). However, I can't tell if I'm even really looking at the right thing at this point, or am just seeing bytes and concocting a pattern in my brain.
I built this project based upon the example "external_memory_interface" boot loader and bootloadable projects, which used I2C as the external interface, and run on the CY8CKIT-042 dev kit that has a 128B page size for the internal and external flash. I made the changes to move from I2C to SPI, and I'm sure those changes are correct, because as I said, each row is passing its checksum, and the entire image in external flash is valid (so it passed its checksum).
I'm thoroughly stumped here. I don't know if there is some clocking issue? Is there some other change that is needed that I'm not aware of due to the change from the example code on a 128B page size to a 256B page size? It's incredibly frustrating. It's not a hardware problem, because it fails the same way on every board (image copies to external flash successfully, passes checksum, fails after copying internal with a bad app checksum, reboot to copy it again).
Attached is the project.
Show LessDear all,
I hope you guys can help me with this. I am having a problem with the PSoC 4 (CY84245AXI-483) code that it keeps entering in a infinite loop inside a interruption handler (CY_ISR(IntDefaultHandler)).
The project consists in an End Point XBEE node that has a user Button (BTN) connected to it. In the StartUp of the device, if the button is pressed, it executes the XBEE configuration (network, IOs,etc.). Later this button can only be used to send a dummy data to the Network coordinator to allow proper addressing of all nodes. This action is handled by an rising edge interrupt routine that enters in critical region (disabling all interrupts) while the user is pressing the button to send the dummy data.
The first time that the system runs (button pressed) all the configuration works perfectly and the dummy data runs once. Then the PSoC enters in the nonsense infinite loop.
I read here in the forum and also in the PSoC Developer forum that it is something related to interruption handlers declaration. But I could not find any issue related to that in my current code.
Any Help will be greatly appreciated.
ps.: The XBEE communication is all handled in API mode.
Find the project bundle attached.
Show LessHello
I am working with the CYBL11573-56 and have come across an issue that I would like to get some feed back on. My system is using 4 of the ADC channels to read accelerometer X, Y, Z axis and battery level info. The system reads and transmits the XYZ data over the BLE every 20 ms through a notify characteristic. When the BLE signal gets weak (Below -75dB RSSI) I start seeing missed ADC reads and it looks like the BLE stack is blocking the ADC callback. Has anyone run into anything like this?
Thanks,
-Chris
Show LessI am experiencing low signal strength when using the CYBLE-224110-EVAL in short range (i.e. PA/LNA disabled). My setup has it connected to the Pioneer CY8CKIT-042-BLE.
I have a simple BLE component that's advertising at 0dB TX power. RSSI (as checked on multiple known-good Android handsets) when right next to it is around -77dB - it should be more like -40.
If I enable the PA/LNA, then the RSSI improves massively to better than -30dB. However, the current will exceed our budget.
Is there any reason the signal strength is so poor with the PA/LNA disabled?
Show LessHi,
Please help to review the attached schematic
The interfacing between keypad and microcontroller (LPC1788 from NXP) is provided through I2C communication.
Please advise if any changes to be made. Thank you
Regards
Maruthi
Show LessI need the HTS and ECCN number for a Cypress kit "CYALKIT-E02".
But, I can't find "CYALKIT-E02" in the below HP.
http://www.cypress.com/knowledge-base-article/how-do-i-get-hts-and-eccn-number-cypress-kit-kba81250
Thank you.
Show LessSo, where is the errata sheet for PSoC4000? I've searched the site high and low, and found nothing. Despite that, I already found some actual bugs:
- Documentation for the SROM syscall to setup clocks is wrong (TRM "Document No. 001-89309 Rev. *C" page 144). Docs say that this syscall takes a pointer to memory, and there I write param. This never works. Passing the actual param directly (like for "checksum" system call) in SYSARG register does work.
- Either documentation for SPCIF_GEOMETRY is wrong, or the chip has a bug where it reports the wrong value. My CY8C4013SXI-400 (which has 8K of flash) reports this register's value as 0x0001003f. As per register doc sheet (Document No. 001-90002 Rev. *C) that means it has (0x3f + 1) * 256 = 16384 bytes of flash. Of course in reality the chip has 8 (and as a test, I do indeed get a fault if I read past 8K)
- If I use the "Load Flash Bytes" SROM syscall shortly after boot, and point it to an area of flash where i put in the proper params to load 64 bytes of data into the write latches (0x0000d7b6, 0x0000003f) but I DO NOT WRITE THE NEXT 16 WORDS (let's assume i am ok writing whatever garbage was there into flash) , SROM locks up (actual cortex-m0 core lockup bit set and all). However, if those same words of RAM have ever been written before since boot (by core or by the MEMAP) no lockup occurs. (Yes, flash clock is properly set up. Yes, literally writing zeroes or any other values to these bytes immediately before or long before the syscall makes it work properly/)
Given all this, I am guessing at least a few more issues exist. is there a list?
Show Less