PSoC™ 4 Forum Discussions
Hello, we are using the 4.2 BLE pioneer kits and when we connect two of them together using unauthenticated pairing with encryption, we can still see the data payload in plaintext using packet sniffing software. How can I ensure our data payload is encrypted after the initial connection process?
Show LessI am trying to set the GAP Appearance value to a custom (reserved) value and don't see any way to do so. The PSoC Creator software has a picker for the Appearance value that only lets me select pre-set values. Thank you.
Show LessHello,
I'm trying to understand how all these lists work. Please, let me do some afirmations and correct them if they are wrong.
Firstly, I started working with whitelist to filter address of centrals that were trying to connect to my peripheral device. I managed this whitelist manually and it worked fine until appears ble 4.2 and its privacy 1.2. Here we have RPA or random address and now, the same device that is trying to connect to my peripheral has different BD address from one connection to next one. We can not employe whitelist longer for device connection filtering.
So, I started working with bonded addresses list. Bonding requires pairing, and pairing is not mandatory after a connection is stablished. Pairing is necessary for encrypt a connection and for keys exchange. I mean that bonding process will save BDA to bond list and keys to resolve list. These keys are which we will need to resolve random address from central and to be able to encrypt connection again, but not to manage the connection itself. I mean, any central device (bonded or unbonded) will get to connect to my peripheral. Only bonded devices will get authenticate succesfuly. Others, will not get authentication but they could stay connected and unauthenticated if it is not requiered. Pairing and authentication can be requested from central as well as from peripheral.
I've been testing diferent things and I've seen followings:
- When Pairing process is completed it automatically includes the central's BDA in the peripheral's whitelist. Up to 8 address can be saved. The 9th one will not be saved. If central's address is random type and it changes every connection, each new address will be included as new index in the whitelist.
- When Pairing process is completed it automatically includes the central's BDA in the peripheral's bond list. If central's BDA is RPA type and change every connection, the previous random address in the list will be updated with the new one.
I've not tested resolve list yet. Is there any document in which all that list management mechanism is described ?
Any correction/clarification of my text will be appreciated.
Best regards,
Asier.
Show LessHi,
In my proyect, addresses added to whitelist in peripheral are erased when turn off device.
Is there anyway to save this whitelist to flash memory and this way not to loose addresses in it ?
Thank you,
Asier.
Show LessHi there,
We're looking to improve the touch performance of our products by moving from PCB electrodes to a dedicated touch film. Can anyone provide any references to info on how 2.4GHz RF is impacted by touch film? Specifically I'm wondering how much a full ITO matrix will degrade RF performance, assuming the touch surface is the only window in the product for RF. An alternative would be dedicated buttons, or using silver electrodes, but again, I'd like some info on the impact they have.
Thanks,
Tom
Show LessHello,
I have seen the breathing LED example with PSoC4 http://www.cypress.com/documentation/application-notes/ce97634-psoc-4-breathing-led and I wonder whether there is a PSoC way of doing separately just the lighting up and separately dimming action. It is not important whether only one or two PWMs are used, as long as it does what I think of.
The only way I can do this now is changing the PWM period in a for cycle.
Thank you,
David
Show LessIs there any way around GPIO pins being frozen during deep sleep or do you have to use the higher current Sleep mode if you want to keep an output pin active?
I need to produce a 31.25 khz output signal on a pin continuously for an external IC because the crystal I was using on that IC is becoming obsolete.
The project currently puts 4200 into deep sleep, wakes to process for short time and goes back to sleep.
I could live with up to 1mA consumption (though less is better). Sleep mode seems to be around 1.5 to 3.7mA if I use internal osc at 3MHz.
Show LessI needed to do a relatively long non-blocking time delay initiated by code and running other code a fixed time later. This relatively common requirement proved surprisingly difficult even with help from Cypress support and I was wondering if anyone had a better solution.
My first attempt was to use a timer component (V2.70, 16-Bit UDB implementation on PSOC4). I attached an ISR component to its interrupt output, a logic zero to its reset pin and a 100kHz clock to its clock input. With run mode "oneshot", the ISR gets called once after the delay but there appears to be no API which allows the timer to be reset and triggered again from code. I assumed that "oneshot" meant that the timer would be stopped automatically by hardware when the terminal count (0) was reached and could afterward be restarted using the "Start" API. After extensive trial and error, and a support call to India, I was forced to conclude that there is no way to reset a "oneshot" timer from code. Support first suggested using a register hooked to the hardware reset pin, but I had used all the registers available. They then came up with a complex hardware software hybrid scheme involving a second clock which could be stopped and started from software. The solution I eventually used was to abandon "oneshot" mode and use "continuous" instead, calling the "Stop" API in the ISR explicitly to stop the timer at the end of each run (essentially converting it back to "oneshot"), then using the "Start" API when the time came to restart it for the next run.
Is this limitation intentional in the design of the component? It seems odd that the oneshot mode has no API capable of resetting it. In fact, from the documentation it seems like the Start API should achieve this, but it does not.
Show LessSet up kit to measure sleep mode currents. Used several projects found
to do this. Tried AN86233, Element14 project 95, and CE95322 ap note. Running
I get ~ 5.5 mA, any sleep mode 4.4 mA. All 3 ap notes.
1) Tried different DMMs, same result. Removed jumper for chip Vdd and inserted ammeter there
2) Checked clocks, project, pins, all good
3) Updated project components
4) Using USB power, 5V, no other loads connected to board, LED goes off indicating in sleep mode
5) Observed this caveat Reducing the Deep-Sleep Current for PSoC® 4 Devices - KBA90930
Note that should be called out in project, Cypress should definitely update these ap notes and
projects for this.
I consistently cannot get to sleep like currents, bad chip (but all other indications its good) ?
Regards, Dana.
Show Less