PSoC™ 4 Forum Discussions

am trying to implement the voltage controlled oscillator example:-

http://www.cypress.com/%3FdocID%3D33522&ved=2ahUKEwiV7Oz6sqrkAhUGUR…

The problem:-

Psoc 4 is not straight forward configing the gpio pins following the above example.

Could someone please help with this ?

I found the following and I'm finding it difficult to follow:

http://www.cypress.com/comment/362321

How do I configure the following to implement the above example?

IDAC_1_Start();

for(;;)

{

/* Place your application code here. */

/* Connecting pin 1 to Amux bus where the 8 bit IDAC_1 is connected */

Pin_1_SetDriveMode(Pin_1_DM_ALG_HIZ);

CY_SET_REG32(Pin_1__0__HSIOM, (CY_GET_REG32(Pin_1__0__HSIOM) & ~(Pin_1__0__HSIOM_MASK)));

CY_SET_REG32(Pin_1__0__HSIOM, (CY_GET_REG32(Pin_1__0__HSIOM) | (0x06 << Pin_1__0__HSIOM_SHIFT)));

/* Delay for 1 second */

CyDelay(1000);

/* Removing Pin_1&apos;s connection from Amux bus and settin it to strong drive mode*/

Pin_1_SetDriveMode(Pin_1_DM_STRONG);

CY_SET_REG32(Pin_1__0__HSIOM, (CY_GET_REG32(Pin_1__0__HSIOM) & ~(Pin_1__0__HSIOM_MASK)));

/* Setting Pin_1 component to be operated by

Thanks

Hi,

We use CY8C4048LQI-BL583 to build our unit. When the system bootup, I run the following code.  If I do hardware reset( by using the XRES signal, the pin4 of this chip), PWLED_Write(HIGH) will be executed properly.  But if I do a power up, it will not return from     CySysWdtEnable(CY_SYS_WDT_COUNTER0_MASK) and PWLED_Write(HIGH) below can not be reached.  Please advise!

+++++++++++++++++++++++++++++++++++++++++++++++++++

    WdtIsr_StartEx(WdtIsrHandler);
   
    CyGlobalIntEnable;
   
  /* Set WDT counter 0 to generate interrupt on match */
CySysWdtWriteMode(CY_SYS_WDT_COUNTER0, CY_SYS_WDT_MODE_INT);
CySysWdtWriteMatch(CY_SYS_WDT_COUNTER0, WDT_COUNT0_MATCH);
CySysWdtWriteClearOnMatch(CY_SYS_WDT_COUNTER0, 1u);
/* Enable WDT counters 0 */
       PWLED_Write(LOW);      
    CySysWdtEnable(CY_SYS_WDT_COUNTER0_MASK);  // turn on hardware    <== hang at this line
        PWLED_Write(HIGH);     

1. The issue is occasionally happened when turning the system power on. The other times the power on are working fine.

2. The issue is never happened when reset during the power persisting on.

3. The issue is never happened during the debugging, that's the reason we could not capture the cause about the issue.

We narrow down the line to hang, marked as "<== hang at this line". Please give us the hints to resolve such issue.

Regards,

Tony

Hello all,

I am new in this community and in the industry. I would like to know what is the meaning of 'no load' in the PSoC 4 BLE schematic? Could someone explain this to me please? and also what is the part number for the 50 ohm antenna and R1 zero ohm because it's not indicated in the BOM? Please see attached. Thank you all in advance

Good morning everyone and thanks for reading this post

I'm trying to communicate a PSoC 4 (CY8CKIT-049-42XX, with the chip CY8C4245AXI-483) with an ADC (ADS7280) through SPI. I'll later use a CYBL10162-56LQXI chip.

I want to perform two types of writes to the ADS7280: a 4-bit write, and a 16-bit one. This has led me to use the 4-bit data size when configuring the SCB SPI component. I want the 16-bit write to be continuous, that is, without any changes in the Slave Select pin. This is the reason why I've used the "Transfer separation: continuous" mode, because according to the datasheet, this is exactly what it does.

When using the code that I've included in this post, I've had no luck making it work. Troubleshooting it, I've found that the Slave Select pin DOES change states when it should be down all time, and I've narrowed it down to a problem of high-frequency data transfers, since it only happens at 4mbps and not at 2mbps or the other lower frequencies that I've tried, as you can see in the pictures:

      Slave Select pin while sending four 4-bit packets at 2mbps data rate, transfer continuous mode

      Slave Select pin while sending four 4-bit packets at 4mbps data rate, transfer continuous mode

I'm guessing the MCU can't put data into the TX FIFO fast enough, and the SPI component guesses that the transfer is over when in reality it shouldn't be.

Any other ideas why this happens? Any idea how to fix it? I'd rather not use DMA since the final chip I'll use doesn't have DMA.

Thank you a lot in advance.

I am trying to use the UART communication block using CY8CKIT-043 prototype kit. I am using the standard UART block with the default settings. I only have two commands, UART_Start(); and UART_UART_PutString ("Hello World"); Fired up my Tera Terminal (Same UART settings) and I get nothing back. Is there something I am missing here?

Hello Community,

i tried to measure the voltage with a multimeter at a resistor with 100 ohm. So I set my IDAC with different Values( from 0 to 0xFF) and it always shows me the same Voltage instead of different Volatge at the measurement point. The Measurement point is at Rref!

Thank you

Tak

I'm interested in using CSX method of capsense.

So far I've used CSD method, but this is first time to use CSX.

Then, I have questions.

1. I can't understand principle and method of CSX. What kind of difference between CSX and CSD.

I understand sigma-delta modulation of CSD, but cant' know the difference CSX and CSD.

2. Regarding tuning of capsense(CSX), Is there any difference between CSX and CSD,

saying , tuning method and parameters.

First, I will try CSX method using CY8Ckit-042 with foil capacitance sensor made by myself.

Can I use it?  I'm wondering if wiring to sensor could be suitable or not...

相互容量式（CSX）の使用を考えています。

これまで、自己容量式（CSD）は使ったことがありますが、CSXは初めてです。

そこで質問が2つあります。

１．CSXの測定方法の仕組み・回路がわかりません。CSDとの違いは何ですか？

CSDはシグマデルタ変調ということは理解しているつもりです。

２．Capsense（CSX）のチューニングについて、

チューニング方法やパラメータにCSDと違いはありますか？

Seen from datasheet of MBR3, VDD_ripple max is 50mV. What effects it'll have on the chip or capsense if ripple peak-to-peak of VDD is 200mV?

Thanks and regards.

Grace