PSoC™ 4 Forum Discussions
I want to use CapSense Multi-Frequency and LIN communication at the same time.
If Multi-Frequency is enabled, IMO accuracy will be reduced and an error will occur in LIN communication.
Is it possible to avoid the influence on LIN communication by using an external clock?
Show LessHello,
We have a simple BLE keyboard product that uses CYBLE-012011-00 module. We are having an issue with a newer batch of CYBLE modules with the BLE connection failing to be established. In addition to our own firmware, the problem persists with example projects such as BLE Keyboard and BLE Mouse, and with different host devices (Linux PC, Android, iOS, Windows PC). We have none of these issues with an older batch (2017) of the same modules.
We can replicate the issue by uploading an example firmware (BLE Keyboard) to the older batch. BLE connection is established succesfully and the device works as expected. With the newer batch, the device is seen to transmit the BLE beacon. However, when BLE connection is attempted, generic error is returned on the HCI level and connection fails to establish.
I've included BT monitoring dumps from Bluez taken with the older and newer modules. Also included are images of the module markings. (Note: there's some modification done to the antenna in the older batch. Having this mod done with the newer batch did not resolve the issue)
Show LessHi Support Team,
I build a project in Modus ToolBox2.2 about SAR ADC. I will enable hardware averaging :
1 The following three configuration options are not covered in the initialization code, and using code as an example, can you explain the meaning of each in detail.
"Sequential,Sum"
"Sequential,Fix"
"Interleaved,Sum"
2 What are the APIs involved in this feature?
Thanks!
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Hi! I'm just wondering why there are two components available for quadrature decoding (regular vs. TCPWM) and am wondering when I might choose one over the other.
Show Less- Edit the Bootloader app version using the Bootloader component customizer and build the Bootloader project.
- Read the bootloader version stored in the metadata from the bootloadable application by doing the following - CY_GET_REG16(BOOTLOADER_VERSION_ADDR)
where BOOTLOADER_VERSION_ADDR = CYDEV_FLASH_BASE + CYDEV_FLASH_SIZE - 0 - 64u + 18u (0 as the appId is 0) - Program the new bootloader.
- Build bootloadable project.
- Install the bootloadable .cyacd file in the device.
- The Bootloader application version is eventually retrieved in our C++ host application from the bootloadable project.
This does not serve the purpose of the bootloader version because it ends up retrieving the version of bootloader which is not even yet programmed on the board but ends up retrieving what is stored in the metadata.
Hello,
I am using a PSoC 4 (non-BLE) MCU - CY8C4147AZI-S443.
I am using the SFlash of this device to save some memory I want to save between reboots and software updates.
I want to be able to clear the SFlash before programming a new firmware to the device.
I couldn't find any good way to do that.
The only option that I could find which worked for me was to write an application that clears the SFlash, program this application to the memory of the device and after letting it run, program my real application. I am looking for a better, more automatic way to do it.
I know there is an "SFlash updater tool" that is being downloaded together with the programmer tool. Unfortunately, this tool does not work for the MCU I am using (from its name, I guess it works only for BLE devices).
I was wondering if there is a better way to clear the SFlash.
Any help will be greatly appreciated,
Thanks,
Omri
Dear community members,
i am using KitProg with the module mounted. So far i have 3 projects in my workspace Launcher, Upgradable Stack and my own. So far everything went well and my application is launched after following all the guides for OTA. But if i press the reset button the application starts again but get stuck after printing out the project header.
I have absolutely no idea how to solve it and appreciate your support. Thank you!
Daniel
Show LessHello, I created a project on PSOC 4 using an example LCD project that is available on Psoc Creator, but I don't know if I placed the wires correctly on my LCD, because the LCD just turns on, but doesn't show anything. I put the wires as follows:
But when I send the code to PSOC, only a blue screen appears, as shown in the following photo:
can anybody help me? Checking if I put the pins in the right way?
Show LessHello,
I'm relatively new to the PSOC chip so I would appreciate some guidance. I working on a design that needs to have an extremely low inactive power consumption. We currently targeting the 4200 series and I'm currently developing with the CY8C4245 but that's subject t to change as needed.
We need timer which fires once per hour with ~+/-10% long term accuracy. We'll be in the Deep Sleep mode so the ILO will be active. I plan to calibrate the ILO once per hour using the IMO as a reference during the wake up time. Hopefully the 2% IMO will enable us to calibrate the ILO to something on the order of 10% accuracy. Our product are mostly be used indoors so the temperature will be relatively constant.
I see two possible approaches. The first would be to use the RTC. It looks like the RTC wakes the main processor once per second to increment a counter in firmware. The RTC is overkill for our needs but power draw is is most important parameter. Since the RTC is a firmware implementation, it seems hard to estimate the current draw and I didn't see a spec for it anywhere.
The second approach would be t use a UDB counter. A 32-bit counter with a period of 155,200,000 would generate an IRQ once per hour from the 32kHz ILO. I could adjust the counter period on the fly to calibrate the clock. The 32 bit counter is spec'd at 32 uA/MHz which would be right a 1uA assuming the spec's is still accurate at the low a frequency. A 16 bit counter could generate an IRQ every 2 seconds at an ~0.5 uA consumption but I suspect the extra power consumed by waking more frequently would outweigh the lower power gains.
Any guidance that you can offer would be appreciated. My instinct is that the UDB counter approach is the best option but I'm opening to anything at this point.
Sincerely,
Ben Wirz
Element Products, Inc.
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I've been trying to program the CY8C4245AXI-483 but facing the following error :
Info : http://openocd.org/doc/doxygen/bugs.html
Info : debug_level: 2
Info : adapter speed: 1500 kHz
Info : serial: 101A15C800287400
Info : transport: swd
Info : rst type: soft
Info : adapter speed: 2000 kHz
Info : ** Auto-acquire enabled, use "set PSOC4_USE_ACQUIRE 0" to disable
Info : cortex_m reset_config sysresetreq
Info : none separate
Info : tcl server disabled
Info : Listening on port 4445 for telnet connections
Info : CMSIS-DAP: SWD Supported
Info : CMSIS-DAP: JTAG Supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : KitProg3: FW version: 2.10.878
Info : KitProg3: Pipelined transfers enabled
Info : VTarget = 0.010 V
Info : kitprog3: acquiring PSoC device...
Error: kitprog3: failed to acquire PSoC device
Info : clock speed 2000 kHz
Error: DAP 'psoc4.cpu' initialization failed (check connection, power, etc.)
Error: Failed to connect to the target device
Could you please help me out to solve the programming issue
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