- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
We want to use PSoC4000S devices.
According to 5.11 of PSoC4000S Architecture TRM (002-10129),
the flash area can be specified in the vector table by VTOR.
However, VTOR is not listed in PSoC 4000S Registers TRM (002-10099).
Is there any other information?
Solved! Go to Solution.
- Labels:
-
PSoC 4 Architecture
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I confirmed the register is not listed in PSoC 4000S Registers TRM (002-10099) as well, but it can be used with nothing problem.
I leave some information for VTOR below.
The vector table can be located anywhere in the memory map (flash or SRAM) by modifying the Vector Table Offset Register (VTOR). This register is part of the System Control Space of CM0+ located at 0xE000ED08.
This register takes bits 31:8 of the vector table address; bits 7:0 are reserved.
You can check them in a Section 5.3.3, “Exception Vector Table” of PSoC4000S Architecture TRM (002-10129).
Infineon Technologies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I confirmed the register is not listed in PSoC 4000S Registers TRM (002-10099) as well, but it can be used with nothing problem.
I leave some information for VTOR below.
The vector table can be located anywhere in the memory map (flash or SRAM) by modifying the Vector Table Offset Register (VTOR). This register is part of the System Control Space of CM0+ located at 0xE000ED08.
This register takes bits 31:8 of the vector table address; bits 7:0 are reserved.
You can check them in a Section 5.3.3, “Exception Vector Table” of PSoC4000S Architecture TRM (002-10129).
Infineon Technologies