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Hello,
I'm on the way of builing a UDB component to extract data bytes from a bit stream in DCC format. Here an example:
Until now, I am using two count7 for counting lenght of preamble and byte bits
and a state machine to control everything.
Now I need a serial in shift register to shift in eight bits and to read out by CPU.
A great help would be an example, maybe something like a U(S)ART RX.
Regards
Solved! Go to Solution.
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r.s.jahn,
If communication speed is <=115kBd, it would be much easier to receive and sort out the input stream by using regular UART Rx +CPU. If you decide to go with UDB, I suggest to take a look on SPI component as an example.
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r.s.jahn,
What data clock frequency is? Can standard UART be used?
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Hi,
I mentioned UART RX only as an example,
from which I could derive my own design and because
an UART TX is described in an app note.
So, no standard UART is not usable.
The protocol delivers an data bit stream and a clock.
The UDB cicuit has the task to decode this stream.
The data is sent in packets, starting with a preamble of minimum
of 10 1's followed by data bytes, starting with a single 0.
The packet ist finished with a 1 after the last data byte.
Until now, I have two count7 to count preamble and data bits
and a state machine for control. Now the data bits have to be stuffed
in some sort of shift register, which firmware can read out bytewise.
I thought this could be done with the datapath shift.
Because I didn't use the datapath before, an example would be helpful.
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r.s.jahn,
If communication speed is <=115kBd, it would be much easier to receive and sort out the input stream by using regular UART Rx +CPU. If you decide to go with UDB, I suggest to take a look on SPI component as an example.