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PSoC™ 4

Answer
New Contributor II

Whenever I power my chip it ramps up to 8mA  before dropping towards the 4~1 mA range. Is there a way for me to lower that current consumption ? I tried reducing the transmission dB power on my antenna from 0dB to -14dB but I learned that nothing I do on the PSoC creator affects the boot-up consumption.

I am using the:https://github.com/Infineon/PSoC-4-BLE/blob/master/100_Projects_in_100_Days/Day005_Health_Thermomete...

in the demonstration.

Is there anything I can do in this case to lower my hardware or software boot-up current consumption?

 

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1 Solution
Yugandhar
Moderator
Moderator

Hello,

During boot mode, hardware trim settings are loaded from flash to guarantee proper operation during power-up. So the current consumption will be high due to flash operations. Please refer to the 10. Chip operational modes topic in PSoC4 BLE Architecture Trm datasheet for more information.

The device startup begins after the release of a reset source, or after the end of a power supply ramp.
There are two main portions of startup: hardware startup and firmware startup. During hardware startup,
the CPU is halted, and other resources configure the device. During firmware startup, the CPU runs code
generated by PSoC Creator to configure the device. When startup ends, the device is fully configured,
and its CPU begins execution of user-authored main() code.

The current consumption during the hardware boot-up process is fixed because it depends on the hardware design of the chip. The soft boot-up current consumption can be reduced by configuring the clocks to the lowest frequencies and disabling the unnecessary clocks in the Clocks tab of the .cydwr section of PSoC Creator. 

Kindly refer chapter-10 in the document below:

https://www.cypress.com/documentation/component-datasheets/psoc-creator-system-reference-guide-cyboo...

Thanks,
P Yugandhar.

View solution in original post

3 Replies
Yugandhar
Moderator
Moderator

Hello,

During boot mode, hardware trim settings are loaded from flash to guarantee proper operation during power-up. So the current consumption will be high due to flash operations. Please refer to the 10. Chip operational modes topic in PSoC4 BLE Architecture Trm datasheet for more information.

The device startup begins after the release of a reset source, or after the end of a power supply ramp.
There are two main portions of startup: hardware startup and firmware startup. During hardware startup,
the CPU is halted, and other resources configure the device. During firmware startup, the CPU runs code
generated by PSoC Creator to configure the device. When startup ends, the device is fully configured,
and its CPU begins execution of user-authored main() code.

The current consumption during the hardware boot-up process is fixed because it depends on the hardware design of the chip. The soft boot-up current consumption can be reduced by configuring the clocks to the lowest frequencies and disabling the unnecessary clocks in the Clocks tab of the .cydwr section of PSoC Creator. 

Kindly refer chapter-10 in the document below:

https://www.cypress.com/documentation/component-datasheets/psoc-creator-system-reference-guide-cyboo...

Thanks,
P Yugandhar.

View solution in original post

Answer
New Contributor II

I was wondering if there is a physical activity where I can short some pins hardware to make sure to leakage current is abducted. For example, you can remove an LED from a micro-controller and solder a wire to lower the consumption of the chip. I was wondering if I can do something to fit a certain application.

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Yugandhar
Moderator
Moderator

Hello, 

You mean removing the LED from the Board or microcontroller ? If you had a kit then you can do the changes but be aware of the changes. Removing an LED should not result any issue.

Thanks,

P Yugandhar.

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