Messure battery Vdd CYBLE-012011-00 internally, no pin wasting

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ToPh_1104671
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The Module have a dedicated VREF pad, but I guess it's only for bypass cap use?

   

If I import a battery monitor example it wastes a pin, example P3.3 that it calls Vref.

   

What is the difference between VREF and Vref?

   

I have access to LDO 3.3V voltage, would this help getting around wasting a pin?
​The 0.03Vdrop LDO is for a subsystem, so I do plan to run the BLE directly from li-po battery
and have it turn off the ldo when subsystem is sleeping.

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Anonymous
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The Pin 3.3 is the input to the ADC and is called Vref in that project. The VREF is the default pin in the PSoC which is 1.024V.

   

In that project the VREF Is connected to Vref. The input to the ADC is kept constant at 1.024V whereas the Supply of the ADC which is in turn the battery level keeps varying. This is being measured.

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