Interrupt of same port group pins for PSoC4000S

[YoIs_1298666]

Hello,

I am looking at "7.8 Pin Interrupt" in AN86439 for GPIO interrupt.

I have two questions.

1. For example, when assigning two interrupt pins, it is necessary to assign them to consecutive pins. Is it possible to arrange them at different positions like P0.2 and P0.7?

2. If the other interrupt is entered while entering the interrupt handler, we need to check the interrupt pending of Pin_Button_INTSTAT before executing Pin_Button_ClearInterrupt () and exiting the handler. And if the other interrupt  is pending, It is also necessary to execute that interrupt processing. Is this correct?

Best regards,

Yocchi

[LinglingG_46 · Accepted solution]

1: If you want to use the Port0, Pin0.2 and Pin0.7 interrupt, you can use Global Signal (AllPortInt), just liker the below screenshot

2:If the code is running in the interrupt handler, at the same time, there is another interrupt, the core will make a judge depending on the interrupt priority.  The system will handle the higher priority event. 

3: The cortex M0 Support interrupt preemption.

[YoIs_1298666]

Hello,

Thank you very much for your help.

Can I check the interrupt pending bit of each GPIO_PRT0,1,2,4_INTR?

Best regards,

Yocchi