I2C master repeated start for PSoC4000S

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YoIs_1298666
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Hello,

I would like to execute a repeated start of I2C master with PSoC4000S.

According to SCB component datasheet, it seems that it can be executed by setting the mode of the argument.

uint32 SCB_I2CMasterWriteBuf(uint32 slaveAddress, uint8 * wrData, uint32 cnt, uint32 mode)

In order to make a repeated start from the second I2C communication, I tried the following three mode settings

in the first I2C communication.

pastedImage_0.png

As a result, running this API will lock the SCL to "low".

The return value of this API is I2C_I2C_MSTR_NO_ERROR.

The return value of the I2C_I2CMasterStatus API is I2C_I2C_MSTAT_XFER_INP.

How can I execute a repeated start?

Best regards,

Yocchi

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1 Solution
Ekta_N
Moderator
Moderator
Moderator
750 replies posted First like given 250 solutions authored

Hello Yocchi,

1. The status of the result of the first I2C communication is as follows.

     I2C_I2CMasterWriteBuf return value: I2C_I2C_MSTR_NO_ERROR

     I2C_I2CMasterStatus return value: I2C_I2C_MSTAT_WR_CMPLT | I2C_I2C_MSTAT_XFER_HALT | I2CHW_I2C_MSTAT_XFER_INP

                                                             I2C_I2CMasterClearStatus execution

                                                             I2C_I2CMasterStatus execution

                                                             As a result I2C_I2CMasterStatus return value : Keeping I2C_I2C_MSTAT_XFER_INP

                                                             **I2CHW_I2C_MSTAT_XFER_HALT is preferred      

In this case you should check if in the return value of I2C_I2C_MasterStatus the I2C_I2C_MSTAT_WR_CMPLT bit is set, you can wait until the master completes the first transfer and then start the second transfer. something like this:

while (0u == (I2C_I2CMasterStatus() & mI2C_I2C_MSTAT_RD_CMPLT))

        {

        }

2. The SCL is low even if there is no address match for the I2C slave, but what is the best way to handle the subsequent return?

The SCL line should not remain low for a long period. SCL line staying low signifies that there is a bus error. It is not possible to return from this state.

Best Regards

Ekta

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YoIs_1298666
Level 5
Level 5
250 sign-ins 100 replies posted 100 sign-ins

I observed the I2C communication waveform with an oscilloscope.

As a result, I was able to do a Repeated Start.

pastedImage_1.png

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pastedImage_3.png

I have two questions.

1. The status of the result of the first I2C communication is as follows.

     I2C_I2CMasterWriteBuf return value: I2C_I2C_MSTR_NO_ERROR

     I2C_I2CMasterStatus return value: I2C_I2C_MSTAT_WR_CMPLT | I2C_I2C_MSTAT_XFER_HALT | I2CHW_I2C_MSTAT_XFER_INP

                                                             I2C_I2CMasterClearStatus execution

                                                             I2C_I2CMasterStatus execution

                                                             As a result I2C_I2CMasterStatus return value : Keeping I2C_I2C_MSTAT_XFER_INP

                                                             **I2CHW_I2C_MSTAT_XFER_HALT is preferred                                                         

     Which status would be best to look at and execute I2C_I2CMasterWriteBuf for the second I2C communication?

2. The SCL is low even if there is no address match for the I2C slave, but what is the best way to handle the subsequent return?

Best regards,

Yocchi

Ekta_N
Moderator
Moderator
Moderator
750 replies posted First like given 250 solutions authored

Hello Yocchi,

1. The status of the result of the first I2C communication is as follows.

     I2C_I2CMasterWriteBuf return value: I2C_I2C_MSTR_NO_ERROR

     I2C_I2CMasterStatus return value: I2C_I2C_MSTAT_WR_CMPLT | I2C_I2C_MSTAT_XFER_HALT | I2CHW_I2C_MSTAT_XFER_INP

                                                             I2C_I2CMasterClearStatus execution

                                                             I2C_I2CMasterStatus execution

                                                             As a result I2C_I2CMasterStatus return value : Keeping I2C_I2C_MSTAT_XFER_INP

                                                             **I2CHW_I2C_MSTAT_XFER_HALT is preferred      

In this case you should check if in the return value of I2C_I2C_MasterStatus the I2C_I2C_MSTAT_WR_CMPLT bit is set, you can wait until the master completes the first transfer and then start the second transfer. something like this:

while (0u == (I2C_I2CMasterStatus() & mI2C_I2C_MSTAT_RD_CMPLT))

        {

        }

2. The SCL is low even if there is no address match for the I2C slave, but what is the best way to handle the subsequent return?

The SCL line should not remain low for a long period. SCL line staying low signifies that there is a bus error. It is not possible to return from this state.

Best Regards

Ekta

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Hello Ekta-san,

Sorry for the late report.

We have already understood and realized Repeated Start as follows.

pastedImage_0.png

I have a question about the error statuses of uint32 SCB_I2CMasterStatus(void) .

In both "Start-Stop condition" and "NoStop-RepeatedStart condition", Is SCB_I2C_MSTAT_RD_CMPLT or SCB_I2C_MSTAT_WR_CMPLT always output with the error status if an error occurs?

pastedImage_2.png

pastedImage_3.png

Best regards,

Yocchi

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Hello,

There seems to be an errata when executing SCB_I2CMasterWriteBuf ()  of "PSoC 4 Serial Communication Block (SCB) 4.0" with restart condition on I2C master.

pastedImage_1.png

Best regards,

Yocchi

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Ekta_N
Moderator
Moderator
Moderator
750 replies posted First like given 250 solutions authored

Hello Yocchi-san,

Thanks for pointing out to the errata. This tells why the SCB_I2C_MSTAT_RD_CMPLT or SCB_I2C_MSTAT_WR_CMPLT always outputs with the error status if an error occurs.

Did you try to put the SCB_I2CMasterWrteBuf( ) inside the critical section when executing the write function with the restart condition ?

Was this able to resolve the issue?

Best Regards

Ekta

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