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PSoC 4

ToPh_1104671
New Contributor II

Table 49. External Clock Specifications
CMOS input level only.TTL input is not supported

   

I plan to run PRoC BLE at 5V, so what is these cmos level it wants?
As I have a 8MHz TTL clk available.

   

The ExtClk can not be doubled or multiplied? (PRoC does not have PLL ect?)

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4 Replies
ETRO_SSN583
Esteemed Contributor

CMOS Specs from datasheet, attached.

   

 

   

Regards, Dana.

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ETRO_SSN583
Esteemed Contributor

Clocking, no PLL, see attached.

   

 

   

Regards, Dana.

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ToPh_1104671
New Contributor II

Thanks for the prompt response.
I did think it was referring to triggers levels of cmos (70% Vdd), but just wanted to make sure it was not 1.8V core levels.
So no PLL, I guess is OK as I just want to keep same freq domain, could always switch over to IMO or ECO when I need higher speed.

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ETRO_SSN583
Esteemed Contributor

Don't forget to put some series damping R, 10's of ohms, in series with

   

clock source to PSOC pin, layout dependent, to get good signal integrity.

   

 

   

Regards, Dana.

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